On Jun 2, 2011, at 4:54 AM, Colin D Bennett wrote: > On Wed, 1 Jun 2011 11:41:13 +0900 > John Doty <[email protected]> wrote: > >> >> On Jun 1, 2011, at 1:30 AM, Colin D Bennett wrote: >> >>> Power and ground connections are a critical part of the circuit >>> design but would not be visible when looking at the schematic! >> >> It depends on the job. If there are rigorous global rules governing >> these connections, putting them explicitly in the schematic could be >> considered distracting clutter. > > True. But how (and where) would such global rules be defined?
Depends on the job, of course. Designs are often subject to constraints that the tools don't understand out of the box: that's one reason an easily extendable toolkit is useful. Or it may be easy enough to verify in human review. One can also build the rules into the raw material. A verified project library of heavy symbols could accomplish this (but beware of hierarchy: local nets, e.g. GND, in a hierarchical sub-schematic are not the same as top-level nets of the same name in gEDA unless explicitly connected). Another way is that used by Open IP (http://research.kek.jp/people/ikeda/openIP/). This is a set of building blocks for mixed-signal VLSI. See http://www.gedasymbols.org/user/john_doty/ for gEDA symbols. The foundation for Open IP is a set of SPICE subcircuits, suitable for simulation and synthesis. These subcircuits use global nets for power connections, so gEDA need not pay attention. John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ [email protected] _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
