Randall Nortman wrote: I thought it was > basically impossible to get it right without assistance from the CAD > tool.
PCIe keeps the signal lines differential and regular, so you have a chance. The open graphics project is slowly moving along -- they are motivated by several partners that hold the ultimate copyright to all the GPL parts and plan to make a fabless chip business of it. The scope of the idea is so big, and the goal of motherboards is always speed, so it seems not a match for open projects... but maybe Xilinx would fund it for a while :-) DJ Delorie wrote: >I was thinking more >like "every connector goes directly to an FPGA pin". I think it would max out at 400MHz then....that's a routed-big-design FPGA logic speed limit, right? Larry Doolittle wrote: > 1. Self-reconfigurable FPGAs have been promised for years, but aren't > ready, and probably never will be. [jg] I guess that's because the fpga makers seem to not want to let out their programming details -- probably because they let Mentor and Synplicity and the like do all their tools and THEY don't want it let out. JG -- Ecosensory Austin TX _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
