> 1. Self-reconfigurable FPGAs have been promised for years, but aren't > ready, and probably never will be. Think carefully about the boot > sequence, and how one FPGA can boot the next. Having more than one > FPGA is probably a good thing.
What about the new flash-based FPGAs? Maybe not as big, but they seem to be "instant-on". I suppose we could have a CPLD sequence the boot/reset/run sequence. > Assume 1mm pitch and 5/5 space/trace. In concept, reaching all If we can fit it into 6/6 trace/space with 12 mil via holes, that's within spec for common prototype fabs (pcb-pool, specifically, which does 4 and 6 layer). Of course, with QFP, you can hand solder the chips and they easily fit in 6/6 rules. > an overestimate because many interior pads are power and ground. I looked up a spartan-3 FB676, which has 300k gates. The five innermost rows (100 balls) are all power/ground. There are eight rows after that; the outer four make up 352 balls, meaning we lose only about 224 balls. It's 1mm pitch, too. Sweet. Now, if I could solder those on my hotplate... :-) _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
