https://gcc.gnu.org/g:b2c626e64198f47554c33e4aec7b90fac9ac9366
commit r15-10336-gb2c626e64198f47554c33e4aec7b90fac9ac9366 Author: GCC Administrator <[email protected]> Date: Wed Sep 17 00:26:44 2025 +0000 Daily bump. Diff: --- gcc/ChangeLog | 23 +++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/testsuite/ChangeLog | 23 +++++++++++++++++++++++ 3 files changed, 47 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 19b7dc95e137..d56b65f51e29 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,26 @@ +2025-09-16 Jeff Law <[email protected]> + + Backported from master: + 2025-09-12 Jeff Law <[email protected]> + + * lra-constraints.cc (get_equiv): Bounds check before accessing + data in ira_reg_equiv. + +2025-09-16 Jennifer Schmitz <[email protected]> + + PR target/121602 + * config/aarch64/aarch64-sve-builtins.cc + (gimple_folder::fold_active_lanes_to): Add force_vector + statement. + +2025-09-16 Andre Vieira <[email protected]> + + Backported from master: + 2025-08-11 Andre Vieira <[email protected]> + + PR target/121464 + * config/arm/arm.md (arm_<mrrc>, arm_<mcrr>): Fix operand check. + 2025-09-15 Kyrylo Tkachov <[email protected]> Backported from master: diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index fed526bc14b6..a9ffd35574ba 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250916 +20250917 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ab5e8a87f6c6..a7116656a1d6 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,26 @@ +2025-09-16 Jennifer Schmitz <[email protected]> + + PR target/121602 + * gcc.target/aarch64/sve/acle/asm/mul_s16.c: New test. + * gcc.target/aarch64/sve/acle/asm/mul_s32.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/mul_s64.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/mul_s8.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/mul_u16.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/mul_u32.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/mul_u64.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/mul_u8.c: Likewise. + +2025-09-16 Andre Vieira <[email protected]> + + Backported from master: + 2025-08-11 Andre Vieira <[email protected]> + + PR target/121464 + * gcc.target/arm/acle/mcrr.c: Update testcase. + * gcc.target/arm/acle/mcrr2.c: Likewise. + * gcc.target/arm/acle/mrrc.c: Likewise. + * gcc.target/arm/acle/mrrc2.c: Likewise. + 2025-09-15 Kyrylo Tkachov <[email protected]> Backported from master:
