https://gcc.gnu.org/g:828eb1b7b9d5f9d24839549ab3e892cdbc5dc157

commit r15-10239-g828eb1b7b9d5f9d24839549ab3e892cdbc5dc157
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sat Aug 16 00:27:22 2025 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 41 +++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 29 +++++++++++++++++++++++++++++
 3 files changed, 71 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2e8c31883fc1..66d5708a20fa 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,44 @@
+2025-08-15  Alex Coplan  <alex.cop...@arm.com>
+
+       Backported from master:
+       2025-08-08  Alex Coplan  <alex.cop...@arm.com>
+
+       PR target/120986
+       * config/aarch64/aarch64-sve-builtins.cc
+       (function_expander::expand): Relax fpm_t assert to allow
+       modeless const_ints.
+
+2025-08-15  Alex Coplan  <alex.cop...@arm.com>
+
+       Backported from master:
+       2025-08-08  Alex Coplan  <alex.cop...@arm.com>
+
+       PR target/120986
+       * config/aarch64/aarch64-sve2.md (@aarch64_sve_dot<mode>):
+       Switch mode iterator from SVE_FULL_HSF to new iterator;
+       remove insn predicate as this is now taken care of by conditions
+       in the mode iterator.
+       (@aarch64_sve_dot_lane<mode>): Likewise.
+       * config/aarch64/iterators.md (SVE_FULL_HSF_FP8_FDOT): New.
+
+2025-08-15  Pengfei Li  <pengfei....@arm.com>
+
+       PR target/121449
+       * config/aarch64/aarch64-sve.md
+       (mask_gather_load<mode><v_int_container>): Use vg<Vesize>
+       constraints for alternatives with immediate offset.
+       (mask_scatter_store<mode><v_int_container>): Likewise.
+
+2025-08-15  Lulu Cheng  <chengl...@loongson.cn>
+
+       Backported from master:
+       2025-08-15  Lulu Cheng  <chengl...@loongson.cn>
+
+       PR target/121542
+       * config/loongarch/loongarch.cc
+       (loongarch_vector_costs::add_stmt_cost): When using vectype,
+       first determine whether it is NULL.
+
 2025-08-14  Richard Sandiford  <richard.sandif...@arm.com>
 
        PR target/121414
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index b2db30bb7910..78a1889f2cdb 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250815
+20250816
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7bbb84cd05ce..b5077a550122 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,32 @@
+2025-08-15  Alex Coplan  <alex.cop...@arm.com>
+
+       Backported from master:
+       2025-08-08  Alex Coplan  <alex.cop...@arm.com>
+
+       PR target/120986
+       * gcc.target/aarch64/torture/pr120986-2.c: New test.
+
+2025-08-15  Alex Coplan  <alex.cop...@arm.com>
+
+       Backported from master:
+       2025-08-08  Alex Coplan  <alex.cop...@arm.com>
+
+       PR target/120986
+       * gcc.target/aarch64/pr120986-1.c: New test.
+
+2025-08-15  Pengfei Li  <pengfei....@arm.com>
+
+       PR target/121449
+       * g++.target/aarch64/sve/pr121449.C: New test.
+
+2025-08-15  Lulu Cheng  <chengl...@loongson.cn>
+
+       Backported from master:
+       2025-08-15  Lulu Cheng  <chengl...@loongson.cn>
+
+       PR target/121542
+       * gcc.target/loongarch/pr121542.c: New test.
+
 2025-08-14  Richard Sandiford  <richard.sandif...@arm.com>
 
        PR target/121414

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