https://gcc.gnu.org/g:2c28b41d54dbfa1f05191b5463269b8f7d536d73
commit r15-10234-g2c28b41d54dbfa1f05191b5463269b8f7d536d73
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Fri Aug 15 00:25:54 2025 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 64 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 61 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 126 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index bf0b49d5ca90..2e8c31883fc1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,67 @@
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/121414
+ * config/aarch64/aarch64.cc (aarch64_is_variant_pcs): New function,
+ split out from...
+ (aarch64_asm_output_variant_pcs): ...here. Handle various types
+ of SME function type.
+
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/121294
+ * config/aarch64/aarch64.md (UNSPEC_REV_PRED): New unspec.
+ * config/aarch64/aarch64-sve.md (@aarch64_sve_rev<mode>_acle)
+ (*aarch64_sve_rev<mode>_acle): New patterns.
+ * config/aarch64/aarch64-sve-builtins-base.cc
+ (svrev_impl::expand): Use the new patterns for boolean svrev.
+
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/121294
+ * config/aarch64/iterators.md (UNSPEC_TRN1_CONV): Delete.
+ (UNSPEC_PERMUTE_PRED): New unspec.
+ * config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>):
+ Replace with...
+ (@aarch64_sve_<perm_insn><mode>_acle)
+ (*aarch64_sve_<perm_insn><mode>_acle): ...these new patterns.
+ * config/aarch64/aarch64.cc (aarch64_expand_sve_const_pred_trn):
+ Update accordingly.
+ * config/aarch64/aarch64-sve-builtins-functions.h
+ (binary_permute::expand): Use the new _acle patterns for
+ predicate operations.
+
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR rtl-optimization/120718
+ * simplify-rtx.cc (simplify_context::simplify_gen_subreg):
+ Remove MODE_COMPOSITE_P condition.
+
+2025-08-14 Vladimir N. Makarov <vmaka...@redhat.com>
+
+ PR target/121007
+ * lra-constraints.cc (process_address_1): When changing base reg
+ on a reg of the base class, fall back to reload of whole inner address.
+ (process_address): Constrain the iteration number.
+
+2025-08-14 Andrew Pinski <quic_apin...@quicinc.com>
+
+ Backported from master:
+ 2025-06-22 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR target/119830
+ * config/riscv/riscv.cc (riscv_build_integer_1): Make arithmetic in
bclr case
+ clean for 32 bit hosts.
+
+2025-08-14 H.J. Lu <hjl.to...@gmail.com>
+
+ Backported from master:
+ 2025-07-28 H.J. Lu <hjl.to...@gmail.com>
+
+ PR target/121208
+ * config/i386/i386.cc (ix86_tls_get_addr): Issue an error for
+ -mtls-dialect=gnu with no_caller_saved_registers attribute and
+ suggest -mtls-dialect=gnu2.
+
2025-08-13 Richard Sandiford <richard.sandif...@arm.com>
Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 01b99e41aaa4..b2db30bb7910 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250814
+20250815
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1d6918b881b2..7bbb84cd05ce 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,64 @@
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/121414
+ * gcc.target/aarch64/sme/pr121414_1.c: New test.
+
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/121294
+ * gcc.target/aarch64/sve/acle/general/rev_2.c: New test.
+
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/121294
+ * gcc.target/aarch64/sve/acle/general/perm_2.c: New test.
+ * gcc.target/aarch64/sve/acle/general/perm_3.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_4.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_5.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_6.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general/perm_7.c: Likewise.
+
+2025-08-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR rtl-optimization/120718
+ * gcc.target/aarch64/sve/acle/general/pr120718.c: New test.
+
+2025-08-14 Vladimir N. Makarov <vmaka...@redhat.com>
+
+ PR target/121007
+ * gcc.target/powerpc/pr121007.c: New.
+
+2025-08-14 Andrew Pinski <quic_apin...@quicinc.com>
+
+ Backported from master:
+ 2025-06-22 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR target/119830
+ * gcc.target/riscv/pr119830.c: New test.
+
+2025-08-14 H.J. Lu <hjl.to...@gmail.com>
+
+ Backported from master:
+ 2025-07-29 H.J. Lu <hjl.to...@gmail.com>
+
+ PR target/121208
+ * gcc.target/i386/pr121208-1a.c (dg-options): Add
+ -mno-sse -mno-mmx -mno-80387.
+ * gcc.target/i386/pr121208-1b.c (dg-options): Likewise.
+
+2025-08-14 H.J. Lu <hjl.to...@gmail.com>
+
+ Backported from master:
+ 2025-07-28 H.J. Lu <hjl.to...@gmail.com>
+
+ PR target/121208
+ * gcc.target/i386/pr121208-1a.c: New test.
+ * gcc.target/i386/pr121208-1b.c: Likewise.
+ * gcc.target/i386/pr121208-2a.c: Likewise.
+ * gcc.target/i386/pr121208-2b.c: Likewise.
+ * gcc.target/i386/pr121208-3a.c: Likewise.
+ * gcc.target/i386/pr121208-3b.c: Likewise.
+
2025-08-13 Richard Sandiford <richard.sandif...@arm.com>
Backported from master:
