https://gcc.gnu.org/g:2e9ef61c22b1ca767f9af107ea0c5745a8016d40
commit r16-834-g2e9ef61c22b1ca767f9af107ea0c5745a8016d40 Author: GCC Administrator <gccadmin@gcc.gnu.org> Date: Fri May 23 00:17:35 2025 +0000 Daily bump. Diff: --- gcc/ChangeLog | 68 +++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 5 ++++ gcc/m2/ChangeLog | 7 +++++ gcc/testsuite/ChangeLog | 70 +++++++++++++++++++++++++++++++++++++++++++++++++ libatomic/ChangeLog | 8 ++++++ libstdc++-v3/ChangeLog | 22 ++++++++++++++++ 7 files changed, 181 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a0899a747a92..21a26f64437c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,71 @@ +2025-05-22 Joseph Myers <josmy...@redhat.com> + + * doc/implement-c.texi: Document C23 implementation-defined + behavior. + (Constant expressions implementation, Types implementation): New + nodes. + +2025-05-22 Eric Botcazou <ebotca...@adacore.com> + + * dwarf2out.cc (loc_list_from_tree_1) <COMPONENT_REF>: Add specific + handling of bit-fields for big-endian targets. + +2025-05-22 Alexandre Oliva <ol...@adacore.com> + + * config/aarch64/aarch64-vxworks.h (TARGET_OS_USES_R18): Define. + Update comments. + * config/aarch64/aarch64.cc (aarch64_conditional_register_usage): + Mark x18 as fixed on VxWorks. + (aarch64_override_options_internal): Issue sorry message on + -fsanitize=shadow-call-stack if TARGET_OS_USES_R18. + +2025-05-22 Shreya Munnangi <smunnan...@ventanamicro.com> + + * config/riscv/riscv.cc (synthesize_and): When profitable, use a three + shift sequence to clear bits at both upper and lower bits rather than + synthesizing the constant mask. + +2025-05-22 Siarhei Volkau <lis8...@gmail.com> + + PR target/70557 + * config/riscv/riscv.md (movdi_32bit): Add "J" constraint to allow storing 0 + directly to memory. + +2025-05-22 Andrew Pinski <quic_apin...@quicinc.com> + + PR target/120372 + * config/aarch64/aarch64.cc (aarch64_rtx_costs <case CONST_INSN>): Handle + if outer is COMPARE and the constant can be handled by the cmp instruction. + +2025-05-22 Andrew Pinski <quic_apin...@quicinc.com> + + * expmed.cc (canonicalize_comparison): Use rtx_cost directly + instead of gen_move_insn. Print out the choice if dump is enabled. + +2025-05-22 Jakub Jelinek <ja...@redhat.com> + + * gimple-lower-bitint.cc (bitint_extended): New variable. + (bitint_large_huge::lower_shift_stmt): For LSHIFT_EXPR with + bitint_extended if lhs has most significant partial limb extend + it afterwards. + +2025-05-22 Xi Ruoyao <xry...@xry111.site> + + * doc/md.texi: Document the 'q' constraint for LoongArch. + +2025-05-22 Jakub Jelinek <ja...@redhat.com> + + PR target/120360 + * config/i386/predicates.md (x86_64_neg_const_int_operand): New + predicate. + * config/i386/i386.md (*cmp<mode>_plus_1): New pattern. + +2025-05-22 Shreya Munnangi <smunnan...@ventanamicro.com> + + * config/riscv/riscv.cc (synthesize_and): When profitable, use two + shift combinations to clear high or low bits rather than synthsizing + the constant. + 2025-05-22 Pengxuan Zheng <quic_pzh...@quicinc.com> * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Copy zero_op0_p and diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 7a7061068fcc..809477a289db 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20250522 +20250523 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 6bc9a08614c0..4dbc0cfb9539 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,8 @@ +2025-05-22 Jason Merrill <ja...@redhat.com> + + PR c++/120935 + * cp-gimplify.cc (cp_fold): Check always_inline. + 2025-05-21 Iain Sandoe <i...@sandoe.co.uk> * coroutines.cc diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog index 40396a2ac1ec..0009211f75e4 100644 --- a/gcc/m2/ChangeLog +++ b/gcc/m2/ChangeLog @@ -1,3 +1,10 @@ +2025-05-22 Gaius Mulley <gaiusm...@gmail.com> + + PR modula2/120389 + * gm2-compiler/M2GenGCC.mod (CodeXIndr): Check to see that + the type of left is assignment compatible with the type of + right. + 2025-05-13 Gaius Mulley <gaiusm...@gmail.com> PR modula2/120253 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f1d7fc44d4ef..9044e98e29ce 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,73 @@ +2025-05-22 Gaius Mulley <gaiusm...@gmail.com> + + PR modula2/120389 + * gm2/iso/fail/badarray3.mod: New test. + +2025-05-22 Eric Botcazou <ebotca...@adacore.com> + + * ada/acats/overflow.lst: Delete. + * ada/acats/run_all.sh: Do not process overflow.lst. + +2025-05-22 Jason Merrill <ja...@redhat.com> + + * g++.dg/opt/always_inline2.C: Correct PR number. + +2025-05-22 Jason Merrill <ja...@redhat.com> + + PR c++/120935 + * g++.dg/opt/always_inline2.C: New test. + * g++.dg/debug/dwarf2/pubnames-2.C: Suppress -fimplicit-constexpr. + * g++.dg/debug/dwarf2/pubnames-3.C: Likewise. + +2025-05-22 Alexandre Oliva <ol...@adacore.com> + + * gcc.dg/cwsc1.c (CHAIN, aarch64): x9 instead x18 for __vxworks. + * gcc.target/aarch64/reg-alloc-4.c: Drop x18-assigned asm + operand on vxworks. + * gcc.target/aarch64/shadow_call_stack_1.c: Don't expect + -ffixed-x18 error on vxworks, but rather the sorry message. + * gcc.target/aarch64/shadow_call_stack_2.c: Skip on vxworks. + * gcc.target/aarch64/shadow_call_stack_3.c: Likewise. + * gcc.target/aarch64/shadow_call_stack_4.c: Likewise. + * gcc.target/aarch64/shadow_call_stack_5.c: Likewise. + * gcc.target/aarch64/shadow_call_stack_6.c: Likewise. + * gcc.target/aarch64/shadow_call_stack_7.c: Likewise. + * gcc.target/aarch64/shadow_call_stack_8.c: Likewise. + * gcc.target/aarch64/stack-check-prologue-19.c: Likewise. + * gcc.target/aarch64/stack-check-prologue-20.c: Likewise. + +2025-05-22 Andrew Pinski <quic_apin...@quicinc.com> + + PR target/120372 + * gcc.target/aarch64/imm_choice_comparison-2.c: New test. + +2025-05-22 Jakub Jelinek <ja...@redhat.com> + + * gcc.dg/bitintext.h: New file. + * gcc.dg/torture/bitint-82.c: New test. + +2025-05-22 Christophe Lyon <christophe.l...@linaro.org> + + * lib/target-supports.exp (check_effective_target_arm_v8_1a_neon_ok_nocache): Use + -mcpu=unset on arm only. + (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Likewise. + (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Likewise. + (check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache): Likewise. + (check_effective_target_arm_v8_2a_i8mm_ok_nocache): Likewise. + (check_effective_target_arm_v8_2a_bf16_neon_ok_nocache): Likewise. + (check_effective_target_arm_v8_3a_complex_neon_ok_nocache): Likewise. + (check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache): Likewise. + +2025-05-22 Jakub Jelinek <ja...@redhat.com> + + PR target/120360 + * gcc.target/i386/pr120360.c: New test. + +2025-05-22 Dongyan Chen <chendong...@isrc.iscas.ac.cn> + + * gcc.target/riscv/cset-sext-sfb.c: Skip for -Oz. + * gcc.target/riscv/zba-slliuw.c: Skip for -Og. + 2025-05-21 Jeff Law <j...@ventanamicro.com> PR target/120368 diff --git a/libatomic/ChangeLog b/libatomic/ChangeLog index f0901b84fb38..6716f0409174 100644 --- a/libatomic/ChangeLog +++ b/libatomic/ChangeLog @@ -1,3 +1,11 @@ +2025-05-22 Alexandre Oliva <ol...@adacore.com> + + * configure.tgt: Set partial_libatomic on *-*-vxworks*. + * configure.ac (PARTIAL_VXWORKS): New AM_CONDITIONAL. + * Makefile.am (libatomic_la_SOURCES): Select few sources for + PARTIAL_VXWORKS. + * configure, Makefile.in: Rebuilt. + 2025-05-09 David Malcolm <dmalc...@redhat.com> PR other/116792 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 5365b5d17608..ab3c14455e92 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,25 @@ +2025-05-22 Jonathan Wakely <jwak...@redhat.com> + Tomasz KamiĆski <tkami...@redhat.com> + + * include/bits/allocated_ptr.h (_Scoped_allocation): New class + template. + +2025-05-22 Jonathan Wakely <jwak...@redhat.com> + + * testsuite/util/pstl/test_utils.h (ForwardIterator::operator++): + Fix return type. + (BidirectionalIterator::operator++): Likewise. + (BidirectionalIterator::operator--): Likewise. + +2025-05-22 Jonathan Wakely <jwak...@redhat.com> + + PR libstdc++/120367 + * include/bits/stl_vector.h (_M_range_initialize): Initialize + _M_impl._M_finish. + * testsuite/23_containers/vector/cons/from_range.cc: Check with + a type that throws on construction. + exceptions during construction. + 2025-05-21 Alexandre Oliva <ol...@adacore.com> * testsuite/21_strings/basic_string/numeric_conversions/char/stold.cc: