https://gcc.gnu.org/g:6d1665b109d24b514b47abe0947ad083d8785d81

commit r15-9599-g6d1665b109d24b514b47abe0947ad083d8785d81
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Wed Apr 30 00:25:09 2025 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 23 +++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog |  9 +++++++++
 3 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0a525cf8aa6d..9857b3b6489c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,26 @@
+2025-04-29  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2025-04-24  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR target/119610
+       * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
+       Add a bytes_below_sp parameter and use it to calculate the CFA
+       offsets.  Attach the first SVE CFA note to the move into the
+       associated temporary register.
+       (aarch64_allocate_and_probe_stack_space): Update calls accordingly.
+       Start out with bytes_per_sp set to the frame size and decrement
+       it after each allocation.
+
+2025-04-29  liuhongt  <hongtao....@intel.com>
+
+       Backported from master:
+       2025-04-29  liuhongt  <hongtao....@intel.com>
+
+       * config/i386/x86-tune.def (X86_TUNE_DEST_FALSE_DEP_FOR_GLC):
+       Remove other processor except for GLC since this one is only
+       for GLC.
+
 2025-04-25  Jakub Jelinek  <ja...@redhat.com>
 
        Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index e69718003fe1..2848e618ec86 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250429
+20250430
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8a5303c95da3..14ba532dd8fd 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2025-04-29  Richard Sandiford  <richard.sandif...@arm.com>
+
+       Backported from master:
+       2025-04-24  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR target/119610
+       * g++.dg/torture/pr119610.C: New test.
+       * g++.target/aarch64/sve/pr119610-sve.C: Likewise.
+
 2025-04-27  Nathaniel Shead  <nathanielosh...@gmail.com>
 
        Backported from master:

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