https://gcc.gnu.org/g:2b948c6c1172d818ddb9db1fc5f41866d9032cf2
commit r13-9407-g2b948c6c1172d818ddb9db1fc5f41866d9032cf2
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Mon Mar 3 00:22:26 2025 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 7 +++++++
gcc/DATESTAMP | 2 +-
gcc/d/ChangeLog | 20 ++++++++++++++++++++
gcc/testsuite/ChangeLog | 13 +++++++++++++
4 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2a2dbcb4994d..82a0124aeb95 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2025-03-02 Jeff Law <j...@ventanamicro.com>
+
+ PR target/116720
+ * config/riscv/thead.cc (th_mempair_operands_p): Test for
+ aligned memory after swapping operands. Simplify test for
+ first memory access as well.
+
2025-02-27 Haochen Jiang <haochen.ji...@intel.com>
* config/i386/x86-tune.def
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 08a14c75034b..b12838a39432 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250302
+20250303
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index e4faa0075dc3..6fe443eca1d9 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,23 @@
+2025-03-02 Iain Buclaw <ibuc...@gdcproject.org>
+
+ Backported from master:
+ 2025-02-28 Iain Buclaw <ibuc...@gdcproject.org>
+
+ PR d/116961
+ * d-codegen.cc (build_float_cst): Change new_value type from real_t to
+ real_value.
+ * d-ctfloat.cc (CTFloat::fabs): Default initialize the return value.
+ (CTFloat::ldexp): Likewise.
+ (CTFloat::parse): Likewise.
+ * d-longdouble.cc (longdouble::add): Likewise.
+ (longdouble::sub): Likewise.
+ (longdouble::mul): Likewise.
+ (longdouble::div): Likewise.
+ (longdouble::mod): Likewise.
+ (longdouble::neg): Likewise.
+ * d-port.cc (Port::isFloat32LiteralOutOfRange): Likewise.
+ (Port::isFloat64LiteralOutOfRange): Likewise.
+
2025-01-21 Iain Buclaw <ibuc...@gdcproject.org>
Backported from master:
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 76e8487a9466..8404303b0bf1 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,16 @@
+2025-03-02 Jeff Law <j...@ventanamicro.com>
+
+ PR target/116720
+ * gcc.target/riscv/pr116720.c: New test.
+
+2025-03-02 Iain Buclaw <ibuc...@gdcproject.org>
+
+ Backported from master:
+ 2025-02-28 Iain Buclaw <ibuc...@gdcproject.org>
+
+ PR d/116961
+ * gdc.dg/pr116961.d: New test.
+
2025-02-26 Stefan Schulze Frielinghaus <stefa...@gcc.gnu.org>
Backported from master:
