https://gcc.gnu.org/g:97717af3867e1cc3092470d7189066b9df4b3f4f
commit r15-5638-g97717af3867e1cc3092470d7189066b9df4b3f4f
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Mon Nov 25 00:18:18 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 61 ++++
gcc/DATESTAMP | 2 +-
gcc/c/ChangeLog | 6 +
gcc/fortran/ChangeLog | 16 +
gcc/testsuite/ChangeLog | 910 ++++++++++++++++++++++++++++++++++++++++++++++++
5 files changed, 994 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3d13552ddeab..f73bab9da775 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,64 @@
+2024-11-24 Martin Jambor <mjam...@suse.cz>
+
+ * ipa-prop.cc (ipa_duplicate_jump_function): New function.
+ (ipa_edge_args_sum_t::duplicate): Move individual jump function
+ copying to ipa_duplicate_jump_function.
+
+2024-11-24 Uros Bizjak <ubiz...@gmail.com>
+
+ PR target/36503
+ * config/i386/i386.md (*ashl<mode>3_negcnt):
+ New define_insn_and_split pattern.
+ (*ashl<mode>3_negcnt_1): Ditto.
+ (*<insn><mode>3_negcnt): Ditto.
+ (*<insn><mode>3_negcnt_1): Ditto.
+
+2024-11-24 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * config/avr/avr.opt.urls: Regenerate.
+ * config/g.opt.urls: Regenerate.
+ * config/i386/nto.opt.urls: Regenerate.
+ * config/riscv/riscv.opt.urls: Regenerate.
+ * config/rx/rx.opt.urls: Regenerate.
+ * config/sol2.opt.urls: Regenerate.
+
+2024-11-24 Eric Botcazou <ebotca...@adacore.com>
+
+ PR target/117715
+ * config/sparc/sparc-protos.h (sparc_expand_vcond): Rename to...
+ (sparc_expand_vcond_mask): ...this.
+ * config/sparc/sparc.cc (TARGET_VECTORIZE_GET_MASK_MODE): Define.
+ (sparc_vis_init_builtins): Adjust the CODE_FOR_* identifiers.
+ (sparc_get_mask_mode): New function.
+ (sparc_expand_vcond): Rename to...
+ (sparc_expand_vcond_mask): ...this and adjust.
+ * config/sparc/sparc.md (unspec): Remove UNSPEC_FCMP & UNSPEC_FUCMP
+ and rename UNSPEC_FPUCMPSHL into UNSPEC_FPCMPUSHL.
+ (fcmp<gcond:code><GCM:gcm_name><P:mode>_vis): Merge into...
+ (fpcmp<gcond:code>8<P:mode>_vis): Merge into...
+ (fpcmp<fpcmpcond:code><FPCMP:vbits><P:mode>_vis): ...this.
+ (fucmp<gcond:code>8<P:mode>_vis): Merge into...
+ (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Merge into...
+ (fpcmpu<fpcmpucond:signed_code><FPCMP:vbits><P:mode>_vis): ...this.
+ (vec_cmp<FPCMP:mode><P:mode>): New expander.
+ (vec_cmpu<FPCMP:mode><P:mode>): Likewise.
+ (vcond<GCM:mode><GCM:mode>): Delete.
+ (vcondv8qiv8qi): Likewise.
+ (vcondu<GCM:mode><GCM:mode>): Likewise.
+ (vconduv8qiv8qi): Likewise.
+ (vcond_mask_<FPCMP:mode><P:mode>): New expander.
+ (fpcmp<fpcscond:code><FPCSMODE:vbits><P:mode>shl): Adjust.
+ (fpcmpu<fpcsucond:code><FPCSMODE:vbits><P:mode>shl): Likewise.
+ (fpcmpde<FPCSMODE:vbits><P:mode>shl): Likewise.
+ (fpcmpur<FPCSMODE:vbits><P:mode>shl): Likewise.
+ * doc/md.texi (vcond_mask_len_): Fix pasto.
+
+2024-11-24 Eric Botcazou <ebotca...@adacore.com>
+
+ * doc/invoke.texi (-fno-zero-initialized-in-bss): Adjust for Ada.
+ * varasm.cc (get_variable_section): Adjust the error message for an
+ initialized variable in .bss to -fno-zero-initialized-in-bss.
+
2024-11-23 Lewis Hyatt <lhy...@gmail.com>
* gimple.cc (get_tail_padding_adjustment): New function.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index eba8e1cb787f..19047096d89d 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241124
+20241125
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 78c0494dea65..71a983e0a2b5 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2024-11-24 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR c/117741
+ * gimple-parser.cc (c_parser_gimple_compound_statement): Handle
+ CPP_CLOSE_PAREN/CPP_CLOSE_SQUARE with an error and skipping the token.
+
2024-11-22 Andrew Pinski <quic_apin...@quicinc.com>
PR bootstrap/117737
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index c1ab809e7cfc..ea9d97bfd6ab 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,19 @@
+2024-11-24 Paul Thomas <pa...@gcc.gnu.org>
+
+ PR fortran/85869
+ * trans-expr.cc (trans_class_vptr_len_assignment): To access
+ the '_len' field, re must be unlimited polymorphic.
+
+2024-11-24 Paul Thomas <pa...@gcc.gnu.org>
+
+ PR fortran/117730
+ PR fortran/84674
+ * class.cc (add_proc_comp): Only reject a non_overridable if it
+ has no overridden procedure and the component is already
+ present in the vtype.
+ * resolve.cc (resolve_fl_derived): Do not build a vtable for a
+ derived type extension that is completely empty.
+
2024-11-22 Andrew Pinski <quic_apin...@quicinc.com>
PR bootstrap/117737
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ae98be85865c..01ebd500fac6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,913 @@
+2024-11-24 Uros Bizjak <ubiz...@gmail.com>
+
+ * lib/target-supports.exp (add_options_for_float16): Add -mpfpmath=sse.
+
+2024-11-24 Uros Bizjak <ubiz...@gmail.com>
+
+ PR target/36503
+ * gcc.target/i386/pr36503-1.c: New test.
+ * gcc.target/i386/pr36503-2.c: New test.
+
+2024-11-24 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR c/117741
+ * gcc.dg/gimplefe-54.c: New test.
+
+2024-11-24 Eric Botcazou <ebotca...@adacore.com>
+
+ * gcc.target/sparc/20230328-1.c: Adjust to new mnemonics.
+ * gcc.target/sparc/20230328-4.c: Likewise.
+ * gcc.target/sparc/fcmp.c: Likewise.
+ * gcc.target/sparc/fucmp.c: Likewise.
+
+2024-11-24 Eric Botcazou <ebotca...@adacore.com>
+
+ * gnat.dg/specs/bss1.ads: New test.
+
+2024-11-24 Paul Thomas <pa...@gcc.gnu.org>
+
+ PR fortran/84869
+ * gfortran.dg/pr84869.f90: Copy of test below with number
+ corrected.
+ * gfortran.dg/pr85869.f90: deleted.
+
+2024-11-24 Paul Thomas <pa...@gcc.gnu.org>
+
+ PR fortran/85869
+ * gfortran.dg/pr85869.f90: Comment out test of component refs.
+
+2024-11-24 Paul Thomas <pa...@gcc.gnu.org>
+
+ PR fortran/117730
+ PR fortran/84674
+ * gfortran.dg/pr117730_a.f90: New test.
+ * gfortran.dg/pr117730_b.f90: New test.
+ * gfortran.dg/pr84674.f90: New test.
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f16.c: Take
+ the target any-ops instead of xfail.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-f64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/strided/strided_ld_st-1-u8.c: Ditto.
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c: Refine
+ the include file, remove unnecessary options and reconcile the
+ dump check based on options.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/vec_sat_arith.h: Removed.
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i32.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i64.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-1-i8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i32.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i64.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-2-i8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i32.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i64.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-3-i8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i32.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i64.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-4-i8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i16.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i32.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i64.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-1-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-1-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i16.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i32.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i64.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-2-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-2-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i16.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i32.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i64.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-3-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-3-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i16.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i32.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i64.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_s_sub-run-4-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-run-4-i8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-1-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-2-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-3-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-4-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-5-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-6-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-7-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i16-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i32-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-8-i64-to-i8.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-1-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-1-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-2-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-2-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-3-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-3-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-4-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-4-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-5-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-5-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-6-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-6-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-7-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-7-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i16-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i16-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i32-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i32-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i16.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i32.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_s_trunc-run-8-i64-to-i8.c:
Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-run-8-i64-to-i8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip-run.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip-run.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_zip.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvv_run.h: Removed.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vvx_run.h: Removed.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_binary_vx_run.h: Removed.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_data.h: Removed.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_data.h: Removed.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_unary_vv_run.h: Removed.
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c:
+ Refine the include file and remove unnecessary optimization options.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u8.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u16.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u32.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u64.c: Ditto
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u8.c: Ditto
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_data.h: Merge the
+ same file name under autovec/unop.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-2.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-3.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-4.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-6.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-7.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-5.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-10.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-11.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-12.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-9.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-14.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-15.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-13.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-18.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-19.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-20.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-17.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-22.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-23.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-24.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-21.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-2.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-21.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-22.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-1.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-1-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-24.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-7.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-23.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-2-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-10.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-11.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-12.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-9.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-3-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-14.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-15.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-13.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-4-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-18.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-19.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-20.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-17.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-5-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-4.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-5.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-6.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-run-3.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-run-6-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_unary_vv_run.h: New test.
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u16.c:
+ Refactor the test case for include, unnecessary option and
+ target on opts.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u64.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u16.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u32.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u8.c: Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-run-1-u16.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-run-1-u32.c:
Ditto.
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-run-1-u8.c:
Ditto.
+
+2024-11-24 Pan Li <pan2...@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-2.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-3.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-4.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-1.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-6.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-7.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-5.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-26.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-27.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-28.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-25.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-30.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-31.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-32.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-29.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-2.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-3.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-4.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-1.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-38.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-39.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-40.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-37.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-6.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-7.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-8.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-5.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-10.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-11.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-12.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-9.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-14.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-15.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-16.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-13.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-18.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-19.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-20.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-17.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-22.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-23.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-24.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-21.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-26.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-27.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-28.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-25.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-30.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-31.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-32.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-29.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-34.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-35.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-36.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-33.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-2.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-3.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-4.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u64.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-1.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-2.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-3.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-4.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u64.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_imm-run-1.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-run-1-u8.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-2.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u16.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-3.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u32.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-1.c: Move to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u8.c: ...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-run-2.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-run-1-u16.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-run-3.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-run-1-u32.c:
...here.
+ * gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub_trunc-run-1.c: Move
to...
+ * gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-run-1-u8.c:
...here.
+
2024-11-23 Lewis Hyatt <lhy...@gmail.com>
PR preprocessor/117118
