https://gcc.gnu.org/g:8500a8c32b8c67bed757ca87ed1e5a75014c3d73
commit r15-5579-g8500a8c32b8c67bed757ca87ed1e5a75014c3d73
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Fri Nov 22 00:20:01 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 239 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/ada/ChangeLog | 5 +
gcc/c-family/ChangeLog | 5 +
gcc/c/ChangeLog | 6 ++
gcc/cp/ChangeLog | 14 +++
gcc/lto/ChangeLog | 5 +
gcc/testsuite/ChangeLog | 213 ++++++++++++++++++++++++++++++++++++++++++
include/ChangeLog | 6 ++
libgomp/ChangeLog | 9 ++
10 files changed, 503 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f0eba6d52a5d..4e9fc1d4b0dc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,242 @@
+2024-11-21 Jeff Law <j...@ventanamicro.com>
+
+ PR target/117690
+ * config/riscv/riscv.cc (riscv_build_integer): Add missing left
+ shift when using shNadd to derive upper 32 bits from lower 32 bits.
+
+2024-11-21 Arsen Arsenović <ar...@aarsen.me>
+
+ * doc/cpp.texi (__has_include): Document __has_include_next
+ also.
+ (Conditional Syntax): Mention __has_include_next in the
+ description for the __has_include menu entry.
+
+2024-11-21 David Malcolm <dmalc...@redhat.com>
+
+ PR bootstrap/117677
+ * json-parsing.cc (selftest::test_parse_number): Replace
+ ASSERT_EQ of 'double' values with ASSERT_NEAR. Eliminate
+ ASSERT_PRINT_EQ for such values.
+ * selftest.h (ASSERT_NEAR): New.
+ (ASSERT_NEAR_AT): New.
+
+2024-11-21 Georg-Johann Lay <a...@gjlay.de>
+
+ PR target/117726
+ * config/avr/avr.opt (-msplit-bit-shift): Add new optimization option.
+ * common/config/avr/avr-common.cc (avr_option_optimization_table)
+ [OPT_LEVELS_2_PLUS]: Turn on -msplit-bit-shift.
+ * config/avr/avr.h (machine_function.n_avr_fuse_add_executed):
+ New bool component.
+ * config/avr/avr.md (attr "isa") <2op, 3op>: Add new values.
+ (attr "enabled"): Handle them.
+ (ashlsi3, *ashlsi3, *ashlsi3_const): Add "r,r,C15" alternative.
+ Add "r,0,C4l" and "r,r,C4l" alternatives (depending on 2op / 3op).
+ (define_split) [avr_split_bit_shift]: Add 2 new ashift:ALL4 splitters.
+ (define_peephole2) [ashift:ALL4]: Add (match_dup 3) so that the scratch
+ won't overlap with the output operand of the matched insn.
+ (*ashl<mode>3_const_split): Remove unused ashift:ALL4 splitter.
+ * config/avr/avr-passes.cc (emit_valid_insn)
+ (emit_valid_move_clobbercc): Move out of anonymous namespace.
+ (make_avr_pass_fuse_add) <gate>: Don't override.
+ <execute>: Set n_avr_fuse_add_executed according to
+ func->machine->n_avr_fuse_add_executed.
+ (pass_data avr_pass_data_split_after_peephole2): New object.
+ (avr_pass_split_after_peephole2): New rtl_opt_pass.
+ (avr_emit_shift): New static function.
+ (avr_shift_is_3op, avr_split_shift_p, avr_split_shift)
+ (make_avr_pass_split_after_peephole2): New functions.
+ * config/avr/avr-passes.def (avr_pass_split_after_peephole2):
+ Insert new pass after pass_peephole2.
+ * config/avr/avr-protos.h
+ (n_avr_fuse_add_executed, avr_shift_is_3op, avr_split_shift_p)
+ (avr_split_shift, avr_optimize_size_level)
+ (make_avr_pass_split_after_peephole2): New prototypes.
+ * config/avr/avr.cc (n_avr_fuse_add_executed): New global variable.
+ (avr_optimize_size_level): New function.
+ (avr_set_current_function): Set n_avr_fuse_add_executed
+ according to cfun->machine->n_avr_fuse_add_executed.
+ (ashlsi3_out) [case 15]: Output optimized code for this offset.
+ (avr_rtx_costs_1) [ASHIFT, SImode]: Adjust costs of oggsets 15, 16.
+ * config/avr/constraints.md (C4a, C4r, C4r): New constraints.
+ * pass_manager.h (pass_manager): Adjust comments.
+
+2024-11-21 Georg-Johann Lay <a...@gjlay.de>
+
+ * config/avr/avr-passes.cc (absint_t::dump): Fix missing
+ newline in dump.
+
+2024-11-21 Jeff Law <j...@ventanamicro.com>
+
+ PR target/116590
+ * config/riscv/vector.md (pred_mul_<optab>mode_undef): Drop
+ unnecessary alternatives.
+ (pred_<madd_msub><mode>): Likewise.
+ (pred_<macc_msac><mode>): Likewise.
+ (pred_<madd_msub><mode>_scalar): Likewise.
+ (pred_<macc_msac><mode>_scalar): Likewise.
+ (pred_mul_neg_<optab><mode>_undef): Likewise.
+ (pred_<nmsub_nmadd><mode>): Likewise.
+ (pred_<nmsac_nmacc><mode>): Likewise.
+ (pred_<nmsub_nmadd><mode>_scalar): Likewise.
+ (pred_<nmsac_nmacc><mode>_scalar): Likewise.
+
+2024-11-21 Pan Li <pan2...@intel.com>
+
+ * match.pd: Refactor sorts of unsigned SAT_ADD match pattern.
+
+2024-11-21 Tamar Christina <tamar.christ...@arm.com>
+
+ * tree-vect-data-refs.cc (vect_get_data_access_cost): Pass NULL for SLP
+ node.
+ * tree-vect-stmts.cc (record_stmt_cost): Expose.
+ (vect_get_store_cost, vect_get_load_cost): Extend with SLP node.
+ (vectorizable_store, vectorizable_load): Pass SLP node to all costing.
+ * tree-vectorizer.h (record_stmt_cost): Always pass both SLP node and
+ stmt_vinfo to costing.
+ (vect_get_load_cost, vect_get_store_cost): Extend with SLP node.
+
+2024-11-21 Rainer Orth <r...@cebitec.uni-bielefeld.de>
+
+ PR target/102296
+ * config/i386/sol2.h (ASM_DECLARE_OBJECT_NAME): Use decl size
+ instead of type size.
+ * config/sparc/sol2.h (ASM_DECLARE_OBJECT_NAME): Likewise.
+
+2024-11-21 Christoph Müllner <christoph.muell...@vrull.eu>
+
+ * tree-ssa-forwprop.cc (struct _vec_perm_simplify_seq): New data
+ structure to store analysis results of a vec perm simplify sequence.
+ (get_vect_selector_index_map): Helper to get an index map from the
+ provided vector permute selector.
+ (recognise_vec_perm_simplify_seq): Helper to recognise a
+ vec perm simplify sequence.
+ (narrow_vec_perm_simplify_seq): Helper to pack the lanes more
+ tight.
+ (can_blend_vec_perm_simplify_seqs_p): Test if two vec perm
+ sequences can be blended.
+ (calc_perm_vec_perm_simplify_seqs): Helper to calculate the new
+ permutation indices.
+ (blend_vec_perm_simplify_seqs): Helper to blend two vec perm
+ simplify sequences.
+ (process_vec_perm_simplify_seq_list): Helper to process a list
+ of vec perm simplify sequences.
+ (append_vec_perm_simplify_seq_list): Helper to add a vec perm
+ simplify sequence to the list.
+ (pass_forwprop::execute): Integrate new functionality.
+
+2024-11-21 Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/117720
+ * tree-vect-stmts.cc (vectorizable_load): For VMAT_STRIDED_SLP
+ verify the choosen load type is OK with regard to alignment.
+
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ * doc/invoke.texi (-std=c23): Adjust documentation for
+ publication of the ISO/IEC 9899:2024 standard.
+ * doc/standards.texi: Likewise. Document -std=gnu17 and
+ -std=gnu23 options. Mention that -std=gnu23 rather than
+ -std=gnu17 is now the default for C.
+
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR tree-optimization/94589
+ PR tree-optimization/117612
+ * tree-ssa-phiopt.cc (spaceship_replacement): Handle
+ HONOR_NANS (TREE_TYPE (lhs1)) case when possible.
+
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR tree-optimization/94589
+ PR tree-optimization/117612
+ * tree-ssa-phiopt.cc (spaceship_replacement): Fix up
+ a pasto in check when arg1 is 2.
+
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR c/117024
+ * coretypes.h (enum function_class): Add function_c2y_misc
+ enumerator.
+ * builtin-types.def (BT_FN_UINTMAX_INTMAX, BT_FN_ULONG_LONG,
+ BT_FN_ULONGLONG_LONGLONG): New DEF_FUNCTION_TYPE_1s.
+ * builtins.def (DEF_C2Y_BUILTIN): Define.
+ (BUILT_IN_UABS, BUILT_IN_UIMAXABS, BUILT_IN_ULABS,
+ BUILT_IN_ULLABS): New builtins.
+ * builtins.cc (fold_builtin_abs): Handle also folding of u*abs
+ to ABSU_EXPR.
+ (fold_builtin_1): Handle BUILT_IN_U{,L,LL,IMAX}ABS.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ PR target/114567
+ * config/rs6000/rs6000.md (expander signbit<FLOAT128:mode>2): Adjust.
+ (*signbit<mode>2_dm_mem): Rename to ...
+ (signbit<mode>2_dm_mem): ... this.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ * config/rs6000/altivec.md (altivec_vadduqm): Rename to ...
+ (addv1ti3): ... this.
+ (altivec_vsubuqm): Rename to ...
+ (subv1ti3): ... this.
+ * config/rs6000/rs6000-builtins.def (__builtin_altivec_vadduqm):
+ Replace bif expander altivec_vadduqm with addv1ti3.
+ (__builtin_altivec_vsubuqm): Replace bif expander altivec_vsubuqm with
+ subv1ti3.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ * config/rs6000/altivec.md (mode attr for V1TI in VI_unit): Remove.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ * config/rs6000/rs6000.md (*eqv<BOOL_128:mode>3_internal1): Generate
+ insn veqv if TARGET_ALTIVEC and operands are altivec_register_operand.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ * config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_IEEE): Remove.
+ * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
+ ISA_3_0_MASKS_IEEE check with TARGET_P9_VECTOR.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ * config/rs6000/rs6000.cc (rs6000_option_override_internal): Simplify
+ TARGET_P8_VECTOR && TARGET_DIRECT_MOVE as TARGET_P8_VECTOR.
+ (rs6000_output_move_128bit): Simplify TARGET_VSX && TARGET_DIRECT_MOVE
+ as TARGET_DIRECT_MOVE.
+ * config/rs6000/rs6000.h (TARGET_XSCVDPSPN): Simplify conditions
+ TARGET_DIRECT_MOVE || TARGET_P8_VECTOR as TARGET_P8_VECTOR.
+ (TARGET_XSCVSPDPN): Likewise.
+ (TARGET_DIRECT_MOVE_128): Simplify TARGET_DIRECT_MOVE &&
+ TARGET_POWERPC64 as TARGET_DIRECT_MOVE_64BIT.
+ (TARGET_VEXTRACTUB): Likewise.
+ (TARGET_DIRECT_MOVE_64BIT): Simplify TARGET_P8_VECTOR &&
+ TARGET_DIRECT_MOVE as TARGET_DIRECT_MOVE.
+ * config/rs6000/rs6000.md (signbit<mode>2, @signbit<mode>2_dm,
+ *signbit<mode>2_dm_mem, floatsi<mode>2_lfiwax,
+ floatsi<SFDF:mode>2_lfiwax_<QHI:mode>_mem_zext,
+ floatunssi<mode>2_lfiwzx, float<QHI:mode><SFDF:mode>2,
+ *float<QHI:mode><SFDF:mode>2_internal, floatuns<QHI:mode><SFDF:mode>2,
+ *floatuns<QHI:mode><SFDF:mode>2_internal, p8_mtvsrd_v16qidi2,
+ p8_mtvsrd_df, p8_xxpermdi_<mode>, reload_vsx_from_gpr<mode>,
+ p8_mtvsrd_sf, reload_vsx_from_gprsf, p8_mfvsrd_3_<mode>,
+ reload_gpr_from_vsx<mode>, reload_gpr_from_vsxsf, unpack<mode>_dm):
+ Simplify TARGET_DIRECT_MOVE && TARGET_POWERPC64 as
+ TARGET_DIRECT_MOVE_64BIT.
+ (unpack<mode>_nodm): Simplify !TARGET_DIRECT_MOVE || !TARGET_POWERPC64
+ as !TARGET_DIRECT_MOVE_64BIT.
+ (fix_trunc<mode>si2, fix_trunc<mode>si2_stfiwx,
+ fix_trunc<mode>si2_internal): Simplify TARGET_P8_VECTOR &&
+ TARGET_DIRECT_MOVE as TARGET_DIRECT_MOVE.
+ (fix_trunc<mode>si2_stfiwx, fixuns_trunc<mode>si2_stfiwx): Remove some
+ dead code as the guard TARGET_DIRECT_MOVE there never holds.
+ (fixuns_trunc<mode>si2_stfiwx): Change TARGET_P8_VECTOR with
+ TARGET_DIRECT_MOVE which is a better fit.
+ * config/rs6000/vsx.md (define_peephole2 for SFmode in GPR): Simplify
+ TARGET_DIRECT_MOVE && TARGET_POWERPC64 as TARGET_DIRECT_MOVE_64BIT.
+
2024-11-20 Lewis Hyatt <lhy...@gmail.com>
* tree-cfg.cc (assign_discriminators): Fix incorrect value passed to
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 5116abdc66f4..e1e2985b305d 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241121
+20241122
diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog
index c41fbb8bc211..de6471545d91 100644
--- a/gcc/ada/ChangeLog
+++ b/gcc/ada/ChangeLog
@@ -1,3 +1,8 @@
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR c/117024
+ * gcc-interface/utils.cc (flag_isoc2y): New variable.
+
2024-11-20 Eric Botcazou <ebotca...@adacore.com>
PR ada/117538
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 9bb99f954674..f4eb30064009 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,8 @@
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ * c.opt (std=c23, std=gnu23, std=iso9899:2024): Adjust description
+ for publication of the ISO/IEC 9899:2024 standard.
+
2024-11-20 Paul-Antoine Arras <par...@baylibre.com>
* c-attribs.cc (c_common_gnu_attributes): Add attribute for adjust_args
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 4289945062cc..5c69397fcc55 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2024-11-21 Joseph Myers <josmy...@redhat.com>
+
+ PR c/114816
+ * c-decl.cc (grokparms): Do not warn for void parameter type here.
+ (get_parm_info): Give errors for void parameters even when named.
+
2024-11-20 Joseph Myers <josmy...@redhat.com>
PR c/114266
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 67061e0db0c9..d9048d1403cb 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,17 @@
+2024-11-21 Jason Merrill <ja...@redhat.com>
+
+ * module.cc (has_definition): Also true for inline vars.
+
+2024-11-21 Jason Merrill <ja...@redhat.com>
+
+ * module.cc (trees_in::core_vals) [STATEMENT_LIST]: Skip
+ DEBUG_BEGIN_STMT if !MAY_HAVE_DEBUG_MARKER_STMTS.
+
+2024-11-21 Jason Merrill <ja...@redhat.com>
+
+ * name-lookup.cc (lookup_imported_hidden_friend): Call
+ lazy_load_pendings.
+
2024-11-20 Paul-Antoine Arras <par...@baylibre.com>
* decl.cc (omp_declare_variant_finalize_one): Set adjust_args
diff --git a/gcc/lto/ChangeLog b/gcc/lto/ChangeLog
index e388d62d6d7e..e0cfc392087c 100644
--- a/gcc/lto/ChangeLog
+++ b/gcc/lto/ChangeLog
@@ -1,3 +1,8 @@
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR c/117024
+ * lto-lang.cc (flag_isoc2y): New variable.
+
2024-10-25 Jakub Jelinek <ja...@redhat.com>
PR lto/117201
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e9ba4e2da06f..7617e5469dd4 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,216 @@
+2024-11-21 Jeff Law <j...@ventanamicro.com>
+
+ PR target/117690
+ * gcc.target/riscv/pr117690.c: New test.
+ * gcc.target/riscv/synthesis-13.c: Adjust expected output.
+
+2024-11-21 Joseph Myers <josmy...@redhat.com>
+
+ PR c/114816
+ * gcc.dg/c2y-void-parm-1.c: New test.
+ * gcc.dg/noncompile/920616-2.c, gcc.dg/noncompile/921116-1.c,
+ gcc.dg/parm-incomplete-1.c: Update expected diagnostics.
+
+2024-11-21 David Malcolm <dmalc...@redhat.com>
+
+ * lib/print-stack.exp: New file.
+
+2024-11-21 Christoph Müllner <christoph.muell...@vrull.eu>
+
+ * gcc.dg/tree-ssa/satd-hadamard.c: Restrict to aarch64 and x86-64.
+ * gcc.dg/tree-ssa/vector-8.c: Likewise.
+ * gcc.dg/tree-ssa/vector-9.c: Likewise.
+
+2024-11-21 Jason Merrill <ja...@redhat.com>
+
+ * g++.dg/modules/inline-1_a.C: New test.
+ * g++.dg/modules/inline-1_b.C: New test.
+
+2024-11-21 Jeff Law <j...@ventanamicro.com>
+
+ PR target/116590
+ * gcc.target/riscv/pr116590.c: New test.
+
+2024-11-21 Rainer Orth <r...@cebitec.uni-bielefeld.de>
+
+ PR target/102296
+ * gcc.target/i386/struct-size.c: Enable on *-*-solaris*.
+
+2024-11-21 Christoph Müllner <christoph.muell...@vrull.eu>
+
+ * gcc.dg/tree-ssa/satd-hadamard.c: New test.
+ * gcc.dg/tree-ssa/vector-10.c: New test.
+ * gcc.dg/tree-ssa/vector-8.c: New test.
+ * gcc.dg/tree-ssa/vector-9.c: New test.
+ * gcc.target/aarch64/sve/satd-hadamard.c: New test.
+
+2024-11-21 H.J. Lu <hjl.to...@gmail.com>
+
+ * gcc.target/i386/apx-ndd-tls-1a.c: -std=gnu17.
+ * gcc.target/i386/apx-ndd-tls-1b.c: Likewise.
+
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR tree-optimization/94589
+ PR tree-optimization/117612
+ * gcc.dg/pr94589-5.c: New test.
+ * gcc.dg/pr94589-6.c: New test.
+ * g++.dg/opt/pr94589-5.C: New test.
+ * g++.dg/opt/pr94589-6.C: New test.
+
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ PR c/117024
+ * gcc.c-torture/execute/builtins/lib/abs.c (uintmax_t): New typedef.
+ (uabs, ulabs, ullabs, uimaxabs): New functions.
+ * gcc.c-torture/execute/builtins/uabs-1.c: New test.
+ * gcc.c-torture/execute/builtins/uabs-1.x: New file.
+ * gcc.c-torture/execute/builtins/uabs-1-lib.c: New file.
+ * gcc.c-torture/execute/builtins/uabs-2.c: New test.
+ * gcc.c-torture/execute/builtins/uabs-2.x: New file.
+ * gcc.c-torture/execute/builtins/uabs-2-lib.c: New file.
+ * gcc.c-torture/execute/builtins/uabs-3.c: New test.
+ * gcc.c-torture/execute/builtins/uabs-3.x: New test.
+ * gcc.c-torture/execute/builtins/uabs-3-lib.c: New test.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ PR target/114567
+ * gcc.target/powerpc/pr114567.c: New test.
+
+2024-11-21 Kewen Lin <li...@linux.ibm.com>
+
+ * gcc.target/powerpc/p8vector-int128-3.c: New test.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * g++.dg/opt/pr69175.C: Added option "-mcpu=unset".
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/cortex-m55-nodsp-flag-hard.c: Added option
+ "-march=unset".
+ * gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: Likewise.
+ * gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: Likesie.
+ * gcc.target/arm/cortex-m55-nofp-flag-hard.c: Likewise.
+ * gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
+ * gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
+ * gcc.target/arm/cortex-m55-nomve-flag-hard.c: Likewise.
+ * gcc.target/arm/cortex-m55-nomve-flag-softfp.c: Likewise.
+ * gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: Likewise.
+ * gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: Likewise.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * g++.dg/ext/pr57735.C: Use effective-target arm_cpu_xscale_arm.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * g++.target/arm/mve/general-c++/nomve_fp_1.c: Added option
+ "-mcpu=unset".
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/vect-early-break-cbranch.c: Use
+ effective-target arm_arch_v8a_hard.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * g++.target/arm/pr103676.C: Use effective-target
+ arm_cpu_cortex_m7.
+ * gcc.target/arm/no-volatile-in-it.c: Likewise.
+ * gcc.target/arm/fma-sp.c: Use effective-target
+ arm_cpu_cortex_m4_hard.
+ * gcc.target/arm/pr53859.c: Use effective-target
+ arm_cpu_cortex_m4.
+ * gcc.target/arm/mve/intrinsics/pr97327.c: Use effective-target
+ arm_cpu_cortex_m55.
+ * gcc.target/arm/pr65067.c: Use effective-target
+ arm_cpu_cortex_m3.
+ * lib/target-supports.exp: Define effective-target
+ arm_cpu_cortex_m3, arm_cpu_cortex_m4, arm_cpu_cortex_m4_hard,
+ arm_cpu_cortex_m7 and arm_cpu_cortex_m55.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/thumb2-slow-flash-data-2.c: Use
+ effective-target arm_arch_v7em_hard.
+ * gcc.target/arm/thumb2-slow-flash-data-3.c: Likewise.
+ * gcc.target/arm/thumb2-slow-flash-data-4.c: Likewise.
+ * gcc.target/arm/thumb2-slow-flash-data-5.c: Likewise.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/small-multiply-m0-1.c: Use effective-target
+ arm_arch_v6m and added option "-march=unset".
+ * gcc.target/arm/small-multiply-m0-2.c: Likewise.
+ * gcc.target/arm/small-multiply-m0-3.c: Likewise.
+ * gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
+ * gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
+ * gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
+ * gcc.target/arm/small-multiply-m1-1.c: Likewise.
+ * gcc.target/arm/small-multiply-m1-2.c: Likewise.
+ * gcc.target/arm/small-multiply-m1-3.c: Likewise.
+ * lib/target-supports.exp: Define effective-target
+ arm_cpu_cortex_m0_small, arm_cpu_cortex_m0plus_small and
+ arm_cpu_cortex_m1_small.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/pure-code/no-literal-pool-m0.c: Use
+ effective-target arm_cpu_cortex-m0.
+ * gcc.target/arm/pure-code/no-literal-pool-m23.c: Use
+ effective-target arm_cpu_cortex-m23.
+ * gcc.target/arm/pure-code/pr94538-1.c: Likewise.
+ * gcc.target/arm/pure-code/pr109800.c: Use effective-target
+ arm_arch_v7em_hard.
+ * lib/target-supports.exp: Define effective-target
+ arm_cpu_cortex_m0, arm_cpu_cortex_m23 and arm_arch_v7em_hard.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/acle/crc_hf_1.c: Use effective-target
+ arm_arch_v8a_crc_hard.
+ * lib/target-supports.exp: Define effective-target
+ arm_arch_v8a_crc_hard.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/acle/pacbti-m-predef-1.c: Use effective-target
+ arm_arch_v8_1m_main.
+ * gcc.target/arm/acle/pacbti-m-predef-2.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise.
+ * gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise.
+
+2024-11-21 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+ Yvan ROUX <yvan.r...@foss.st.com>
+
+ * gcc.target/arm/pac-1.c: Use effective-target
+ arm_arch_v8_1m_main_pacbti.
+ * gcc.target/arm/pac-2.c: Likewise.
+ * gcc.target/arm/pac-3.c: Likewise.
+ * gcc.target/arm/pac-4.c: Likewise.
+ * gcc.target/arm/pac-5.c: Likewise.
+ * gcc.target/arm/pac-7.c: Likewise.
+ * gcc.target/arm/pac-8.c: Likewise.
+ * gcc.target/arm/pac-9.c: Likewise.
+ * gcc.target/arm/pac-10.c: Likewise.
+ * gcc.target/arm/pac-11.c: Likewise.
+ * gcc.target/arm/pac-12.c: Added option "-mcpu=unset".
+ * gcc.target/arm/pac-13.c: Likewise.
+ * gcc.target/arm/pac-14.c: Likewise.
+ * lib/target-supports.exp
+ (check_effective_target_arm_pacbti_hw): Likewise.
+ * gcc.target/arm/pac-6.c: Use effective-target
+ arm_arch_v8_1m_main.
+ * gcc.target/arm/pac-15.c: Use effective-target
+ arm_arch_v8_1m_main_pacbti and added option "-mcpu=unset".
+
2024-11-20 Harald Anlauf <anl...@gmx.de>
PR fortran/83135
diff --git a/include/ChangeLog b/include/ChangeLog
index a671f83568c6..3e1e568298ad 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2024-11-21 Jakub Jelinek <ja...@redhat.com>
+
+ * dwarf2.h (enum dwarf_source_language): Add comment where
+ the post DWARF 5 additions start. Refresh list from
+ https://dwarfstd.org/languages.html.
+
2024-10-31 Mark Wielaard <m...@klomp.org>
* safe-ctype.h: Change accidently to accidentally.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 456a179b9bb0..82533d6e9048 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,12 @@
+2024-11-21 Rainer Orth <r...@cebitec.uni-bielefeld.de>
+
+ * testsuite/libgomp.c/alloc-pinned-3.c [!__linux__]
+ (set_pin_limit): Add size arg.
+ * testsuite/libgomp.c/alloc-pinned-4.c [!__linux__]
+ (set_pin_limit): Likewise.
+ * testsuite/libgomp.c/alloc-pinned-6.c [!__linux__]
+ (set_pin_limit): Likewise.
+
2024-11-20 Paul-Antoine Arras <par...@baylibre.com>
* testsuite/libgomp.c-c++-common/dispatch-1.c: New test.
