https://gcc.gnu.org/g:bb21d80e3d6e5e91e2d3c6636e3f667a0a44d3e1
commit r14-10913-gbb21d80e3d6e5e91e2d3c6636e3f667a0a44d3e1
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Sat Nov 9 16:07:50 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 98 +++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 150 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 249 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0a4b44f64149..bab76bdd4cf0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,101 @@
+2024-11-09 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-09 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ PR target/117408
+ * config/arm/arm-mve-builtins.cc(handle_arm_mve_h): Detect if MVE
+ types is missing and if so, return error.
+
+2024-11-08 John David Anglin <dang...@gcc.gnu.org>
+
+ * config/pa/predicates.md (base14_operand): Use '&' operator
+ instead of '%' to check displacement alignment.
+
+2024-11-08 John David Anglin <dang...@gcc.gnu.org>
+
+ PR target/117443
+ * config/pa/pa.cc (pa_legitimate_address_p): Allow any
+ 14-bit displacement when reload is in progress and strict
+ is false.
+
+2024-11-08 Tamar Christina <tamar.christ...@arm.com>
+
+ * config/aarch64/aarch64-cores.def (cortex-a725, cortex-x925,
+ neoverse-n3, neoverse-v3, neoverse-v3ae): New.
+ * config/aarch64/aarch64-tune.md: Regenerate
+ * doc/invoke.texi: Document them.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-11-07 Richard Sandiford <richard.sandif...@arm.com>
+
+ * config/aarch64/aarch64-sve2.md (@aarch64_sve_psel<BHSD_BITS>)
+ (*aarch64_sve_psel<BHSD_BITS>_plus): Require TARGET_STREAMING
+ rather than TARGET_STREAMING_SME2.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-11-07 Richard Sandiford <richard.sandif...@arm.com>
+
+ * config/aarch64/aarch64-sve2.md (@aarch64_sve_fclamp<mode>)
+ (*aarch64_sve_fclamp<mode>_x): Require TARGET_STREAMING_SME2
+ rather than TARGET_STREAMING_SME.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-10-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/116999
+ PR target/117045
+ * config/aarch64/aarch64-sve-builtins-base.cc
+ (svwhilelx_impl::fold): Check for WHILELTs of the minimum value
+ and WHILELEs of the maximum value. Fold them to all-false and
+ all-true respectively.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-10-09 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/116629
+ * config/aarch64/aarch64-sve-builtins.cc
+ (function_builder::function_builder): Use direct overloads for LTO.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-08-15 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/116371
+ * config/aarch64/aarch64-sve-builtins-sve2.h (svpext): Rename to...
+ (svpext_lane): ...this.
+ * config/aarch64/aarch64-sve-builtins-sve2.cc (svpext_impl): Rename
+ to...
+ (svpext_lane_impl): ...this and update instantiation accordingly.
+ * config/aarch64/aarch64-sve-builtins-sve2.def (svpext): Rename to...
+ (svpext_lane): ...this.
+
+2024-11-07 Yuta Mukai <mukai.y...@fujitsu.com>
+
+ * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add fujitsu-monaka.
+ * config/aarch64/aarch64-tune.md: Regenerate.
+ * config/aarch64/aarch64.cc: Include fujitsu-monaka tuning model.
+ * doc/invoke.texi: Document -mcpu=fujitsu-monaka.
+ * config/aarch64/tuning_models/fujitsu_monaka.h: New file.
+
+2024-11-07 Hu, Lin1 <lin1...@intel.com>
+
+ Backported from master:
+ 2024-11-06 Hu, Lin1 <lin1...@intel.com>
+
+ PR target/117304
+ * config/i386/i386-builtin.def: Add OPTION_MASK_ISA2_EVEX512 for some
+ AVX512 512-bits instructions.
+
2024-11-06 Tamar Christina <tamar.christ...@arm.com>
Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 6d8a676e763a..7731736334d5 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241107
+20241109
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index be0ea3fc17dd..7a30f55c0de0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,153 @@
+2024-11-09 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-09 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ PR target/117408
+ * gcc.target/arm/mve/pr117408-1.c: New test.
+ * gcc.target/arm/mve/pr117408-2.c: Likewise.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-11-07 Richard Sandiford <richard.sandif...@arm.com>
+
+ * gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c: Replace bfmla*
+ with bfmls*
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-11-07 Richard Sandiford <richard.sandif...@arm.com>
+
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_b16.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_b16.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_b32.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_b32.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_b64.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_b64.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_b8.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_b8.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_c16.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_c16.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_c32.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_c32.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_c64.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_c64.c: ...here.
+ * gcc.target/aarch64/sme2/acle-asm/psel_lane_c8.c: Move to...
+ * gcc.target/aarch64/sme/acle-asm/psel_lane_c8.c: ...here.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-11-07 Richard Sandiford <richard.sandif...@arm.com>
+
+ * gcc.target/aarch64/sme/clamp_3.c: Force sme2
+ * gcc.target/aarch64/sme/clamp_4.c: Likewise.
+ * gcc.target/aarch64/sme/clamp_5.c: New test.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-10-14 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/116999
+ PR target/117045
+ * gcc.target/aarch64/sve/acle/general/whilele_5.c: Fix bogus
+ expected result.
+ * gcc.target/aarch64/sve/acle/general/whilele_11.c: New test.
+ * gcc.target/aarch64/sve/acle/general/whilele_12.c: Likewise.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-10-09 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/116629
+ * gcc.target/aarch64/sve/acle/general/pr106326_2.c: New test.
+
+2024-11-08 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-08-15 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR target/116371
+ * gcc.target/aarch64/sme2/acle-asm/pext_c16.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c16_x2.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c32.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c32_x2.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c64.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c64_x2.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c8.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_c8_x2.c: Replace with...
+ * gcc.target/aarch64/sme2/acle-asm/pext_lane_c16.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c16_x2.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c32.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c32_x2.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c64.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c64_x2.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c8.c,
+ gcc.target/aarch64/sme2/acle-asm/pext_lane_c8_x2.c: ...these new tests,
+ testing for svpext_lane instead of svpext.
+
+2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/epilog-1.c: Use check-function-bodies.
+
+2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+ Richard Earnshaw <rearn...@arm.com>
+
+ * gcc.target/arm/pr68620.c: Use effective-target
+ arm_libc_fp_abi.
+ * lib/target-supports.exp: Define effective-target
+ arm_libc_fp_abi.
+
+2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/pr40457-2.c: Add vst1.32 as an allowed
+ instruction.
+
+2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * g++.dg/vect/pr84556.cc: Change from "dg-do run" with selector
+ to instead use dg-require-effective-target with the same
+ selector.
+
+2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ Backported from master:
+ 2024-11-08 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * g++.target/arm/mve/general-c++/nomve_fp_1.c: Use
+ effective-target arm_fp.
+
+2024-11-07 Hu, Lin1 <lin1...@intel.com>
+
+ Backported from master:
+ 2024-11-07 Hu, Lin1 <lin1...@intel.com>
+
+ * gcc.target/i386/pr117304-1.c: Modify regexp.
+
+2024-11-07 Hu, Lin1 <lin1...@intel.com>
+
+ Backported from master:
+ 2024-11-06 Hu, Lin1 <lin1...@intel.com>
+
+ PR target/117304
+ * gcc.target/i386/pr117304-1.c: New test.
+
2024-11-06 Tamar Christina <tamar.christ...@arm.com>
Backported from master:
