https://gcc.gnu.org/g:f0d34e8ad27993d7f1e49ea25520346edcd2766f
commit r15-4970-gf0d34e8ad27993d7f1e49ea25520346edcd2766f
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Wed Nov 6 00:18:35 2024 +0000
Daily bump.
Diff:
---
ChangeLog | 5 +++
gcc/ChangeLog | 112 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/c/ChangeLog | 6 +++
gcc/cp/ChangeLog | 54 +++++++++++++++++++++++
gcc/fortran/ChangeLog | 15 +++++++
gcc/testsuite/ChangeLog | 102 +++++++++++++++++++++++++++++++++++++++++++
7 files changed, 295 insertions(+), 1 deletion(-)
diff --git a/ChangeLog b/ChangeLog
index 42a66e1ecd9a..24601b33e7de 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2024-11-05 Nick Clifton <ni...@redhat.com>
+
+ * configure.ac: Add sim to noconfigdirs for ARM targets.
+ * configure: Regenerate.
+
2024-10-30 Soumya AR <soum...@nvidia.com>
* MAINTAINERS: Add myself to write after approval and DCO.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3f7eb2cc863d..1a1a9c1bc9b1 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,115 @@
+2024-11-05 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * match.pd (X != 0 ? X + ~0 : 0): Fix comment.
+
+2024-11-05 Kyrylo Tkachov <ktkac...@nvidia.com>
+
+ PR target/117449
+ * config/aarch64/aarch64-simd.md (*aarch64_simd_rotate_imm<mode>):
+ Match only when can_create_pseudo_p ().
+ * config/aarch64/aarch64.cc (aarch64_emit_opt_vec_rotate): Assume
+ can_create_pseudo_p ().
+
+2024-11-05 liuhongt <hongtao....@intel.com>
+
+ * config/i386/i386-expand.cc
+ (ix86_expand_vector_bf2sf_with_vec_perm): New function.
+ * config/i386/i386-protos.h
+ (ix86_expand_vector_bf2sf_with_vec_perm): New Declare.
+ * config/i386/mmx.md (extendv2bfv2sf2): New expander.
+ * config/i386/sse.md (extend<sf_cvt_bf16_lower><mode>2):
+ Ditto.
+ (VF1_AVX512BW): New mode iterator.
+ (sf_cvt_bf16): Add V4SF.
+ (sf_cvt_bf16_lower): New mode attr.
+
+2024-11-05 liuhongt <hongtao....@intel.com>
+
+ * config/i386/i386-expand.cc
+ (ix86_expand_vector_sf2bf_with_vec_perm): New function.
+ * config/i386/i386-protos.h
+ (ix86_expand_vector_sf2bf_with_vec_perm): New declare.
+ * config/i386/mmx.md (truncv2sfv2bf2): New expander.
+ * config/i386/sse.md (truncv4sfv4bf2): Ditto.
+ (truncv8sfv8bf2): Ditto.
+ (truncv16sfv16bf2): Ditto.
+
+2024-11-05 Hu, Lin1 <lin1...@intel.com>
+
+ PR target/117416
+ * config/i386/i386-expand.cc (ix86_expand_builtin): Raise warning when
+ op1 isn't in range of [0, 2] and set op1 as const0_rtx, and raise
+ warning when op3 isn't in range of [0, 1].
+
+2024-11-05 Richard Biener <rguent...@suse.de>
+
+ PR middle-end/117433
+ * cfgexpand.cc (expand_gimple_stmt_1): Use emit_block_move
+ when moving temp to BLKmode target.
+
+2024-11-05 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * config/aarch64/aarch64-passes.def: Don't add
pass_tag_collision_avoidance.
+ * config/aarch64/aarch64-protos.h (make_pass_tag_collision_avoidance):
Remove.
+ * config/aarch64/aarch64-tuning-flags.def (RENAME_LOAD_REGS): Remove.
+ * config/aarch64/tuning_models/qdf24xx.h (qdf24xx_tunings): Set tuning
flags to
+ AARCH64_EXTRA_TUNE_NONE.
+ * config/aarch64/falkor-tag-collision-avoidance.cc: Removed.
+ * config/aarch64/t-aarch64 (falkor-tag-collision-avoidance.o): Remove.
+ * config.gcc (aarch64*-*-*): Remove falkor-tag-collision-avoidance.o
from extra_objs.
+
+2024-11-05 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * config/aarch64/aarch64-cores.def (falkor): Use cortex-a57 scheduler.
+ (saphira): Likewise.
+ * config/aarch64/aarch64.md: Don't include falkor.md and saphira.md.
+ * config/aarch64/falkor.md: Removed.
+ * config/aarch64/saphira.md: Removed.
+
+2024-11-05 Levy Hsu <ad...@levyhsu.com>
+
+ * config/i386/i386-expand.cc (ix86_expand_branch): Handle BFmode
+ when TARGET_AVX10_2_256 is enabled.
+ (ix86_prepare_fp_compare_args): Use SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P.
+ (ix86_expand_fp_movcc): Ditto.
+ (ix86_expand_fp_compare): Handle BFmode under IX86_FPCMP_COMI.
+ * config/i386/i386.cc (ix86_multiplication_cost): Use
+ SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P.
+ (ix86_division_cost): Ditto.
+ (ix86_rtx_costs): Ditto.
+ (ix86_vector_costs::add_stmt_cost): Ditto.
+ * config/i386/i386.h (SSE_FLOAT_MODE_SSEMATH_OR_HF_P): Rename to ...
+ (SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P): ...this, and add BFmode.
+ * config/i386/i386.md (*cmpibf): New define_insn.
+
+2024-11-05 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (get_type_num_typedef): New function.
+ (get_type_num): Call get_type_num_typedef.
+ * dwarf2codeview.h (T_HRESULT): Define.
+
+2024-11-05 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (struct codeview_custom_type): Add new fields to
+ lf_pointer struct in union.
+ (write_lf_pointer): Write containing_class and ptr_to_mem_type if
+ applicable.
+ (get_type_num_subroutine_type): Write correct containing_class_type if
+ this is a pointer to a member function.
+ (get_type_num_ptr_to_member_type): New function.
+ (get_type_num): Call get_type_num_ptr_to_member_type.
+ * dwarf2codeview.h (CV_PTR_MODE_MASK, CV_PTR_MODE_PMEM): Define.
+ (CV_PTR_MODE_PMFUNC, CV_PMTYPE_D_Single, CV_PMTYPE_F_Single): Likewise.
+
+2024-11-05 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (enum cv_leaf_type): Add LF_BCLASS.
+ (struct codeview_subtype): Add lf_bclass to union.
+ (write_cv_padding): Add declaration.
+ (write_lf_fieldlist): Handle LF_BCLASS records.
+ (add_struct_inheritance): New function.
+ (get_type_num_struct): Call add_struct_inheritance.
+
2024-11-04 Craig Blackmore <craig.blackm...@embecosm.com>
* config/riscv/riscv.cc (riscv_use_by_pieces_infrastructure_p):
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 30cad970f748..e7bef9850f2a 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241105
+20241106
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 51c520ac634e..c9d0c8c982e8 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,9 @@
+2024-11-05 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR c/117445
+ * gimple-parser.cc (c_parser_gimple_statement): Remove
+ support for comparisons before the querry (`?`) token.
+
2024-11-01 David Malcolm <dmalc...@redhat.com>
PR bootstrap/117361
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index e99c26d5e7fc..fdb726c70e4d 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,57 @@
+2024-11-05 Jason Merrill <ja...@redhat.com>
+
+ PR c++/116634
+ * init.cc (can_init_array_with_p): Allow PR59465 case with
+ permerror.
+
+2024-11-05 Simon Martin <si...@nasilyan.com>
+
+ PR c++/117099
+ PR c++/117129
+ * typeck.cc (check_return_expr): Upon error, set
+ current_function_return_value to error_mark_node.
+
+2024-11-05 Simon Martin <si...@nasilyan.com>
+
+ PR c++/117101
+ * init.cc (std_placement_new_fn_p): Check first_arg against
+ NULL_TREE.
+
+2024-11-05 Simon Martin <si...@nasilyan.com>
+
+ PR c++/117158
+ * typeck.cc (cp_build_array_ref): Only wrap array expression
+ into a SAVE_EXPR at template instantiation time.
+
+2024-11-05 Jakub Jelinek <ja...@redhat.com>
+
+ PR c++/117370
+ * cp-tree.h (is_std_class): Declare.
+ * constexpr.cc (is_std_class): New function.
+ (is_std_allocator): Use it.
+ * decl.cc (grok_op_properties): Mark global replaceable
+ operator new/delete operators with const std::nothrow_t & last
+ argument with DECL_IS_REPLACEABLE_OPERATOR.
+
+2024-11-05 Nathaniel Shead <nathanielosh...@gmail.com>
+
+ PR c++/99274
+ * module.cc (trees_in::is_matching_decl): Merge default
+ arguments.
+ * tree.cc (cp_tree_equal) <AGGR_INIT_EXPR>: Handle unification
+ of AGGR_INIT_EXPRs with new VAR_DECL slots.
+
+2024-11-05 Nathaniel Shead <nathanielosh...@gmail.com>
+
+ PR c++/105443
+ * module.cc (loc_spans::locs_exhausted_p): New field.
+ (loc_spans::loc_spans): Initialise it.
+ (loc_spans::locations_exhausted_p): New function.
+ (module_state::read_prepare_maps): Move inform into...
+ (loc_spans::report_location_exhaustion): ...this new function.
+ (module_state::write_location): Check for writing module
+ locations stored due to resource exhaustion.
+
2024-11-02 Nathaniel Shead <nathanielosh...@gmail.com>
Jason Merrill <ja...@redhat.com>
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 4517136dd7ea..316d0a79ecb0 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,18 @@
+2024-11-05 David Malcolm <dmalc...@redhat.com>
+
+ PR fortran/117442
+ * error.cc (error_buffer): Convert to a pointer so it can be
+ heap-allocated.
+ (gfc_error_now): Update for error_buffer being heap-allocated.
+ (gfc_clear_error): Likewise.
+ (gfc_error_flag_test): Likewise.
+ (gfc_error_check): Likewise.
+ (gfc_push_error): Likewise.
+ (gfc_pop_error): Likewise.
+ (gfc_diagnostics_init): Allocate error_buffer on the heap, rather
+ than statically.
+ (gfc_diagnostics_finish): Delete error_buffer.
+
2024-11-02 Thomas Koenig <tkoe...@gcc.gnu.org>
* check.cc (gfc_check_mask): Handle BT_INSIGNED.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0ae449566f5c..675c596947a8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,105 @@
+2024-11-05 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/pr68620.c: Use effective-target arm_neon.
+ * gcc.target/arm/pr78041.c: Use effective-target arm_arch_v7a.
+
+2024-11-05 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ PR testsuite/116623
+ * gcc.target/arm/mve/dlstp-compile-asm-2.c: Align test5 and
+ test8 with changes in r15-1619-g3b9b8d6cfdf.
+
+2024-11-05 Torbjörn SVENSSON <torbjorn.svens...@foss.st.com>
+
+ * gcc.target/arm/pr98636.c: Use effective-target
+ arm_fp16_alternative.
+
+2024-11-05 Kyrylo Tkachov <ktkac...@nvidia.com>
+
+ PR target/117449
+ * gcc.c-torture/compile/pr117449.c: New test.
+
+2024-11-05 Peter Bergner <berg...@linux.ibm.com>
+
+ PR testsuite/117444
+ * gcc.target/powerpc/safe-indirect-jump-3.c: Add -fjump-tables to
+ dg-options.
+
+2024-11-05 Jason Merrill <ja...@redhat.com>
+
+ PR c++/116634
+ * g++.dg/diagnostic/aggr-init1.C: Expect warning with -fpermissive.
+ * g++.dg/init/array62.C: Adjust diagnostic.
+ * g++.dg/init/array63.C: Adjust diagnostic.
+ * g++.dg/init/array64.C: Adjust diagnostic.
+
+2024-11-05 Simon Martin <si...@nasilyan.com>
+
+ PR c++/117099
+ PR c++/117129
+ * g++.dg/parse/crash78.C: New test.
+ * g++.dg/parse/crash78a.C: New test.
+ * g++.dg/parse/crash79.C: New test.
+
+2024-11-05 Simon Martin <si...@nasilyan.com>
+
+ PR c++/117101
+ * g++.dg/init/new52.C: New test.
+ * g++.dg/init/new53.C: New test.
+
+2024-11-05 Simon Martin <si...@nasilyan.com>
+
+ PR c++/117158
+ * g++.dg/cpp1z/eval-order13.C: New test.
+ * g++.dg/parse/crash77.C: New test.
+
+2024-11-05 Di Zhao <diz...@os.amperecomputing.com>
+
+ PR tree-optimization/110279
+ * gcc.dg/pr110279-1.c: add target selector.
+
+2024-11-05 liuhongt <hongtao....@intel.com>
+
+ * gcc.target/i386/avx512bw-extendbf2sf.c: New test.
+ * gcc.target/i386/sse2-extendbf2sf.c: New test.
+
+2024-11-05 liuhongt <hongtao....@intel.com>
+
+ * gcc.target/i386/avx512bf16-truncsfbf.c: New test.
+ * gcc.target/i386/avx512bw-truncsfbf.c: New test.
+ * gcc.target/i386/ssse3-truncsfbf.c: New test.
+
+2024-11-05 Hu, Lin1 <lin1...@intel.com>
+
+ PR target/117416
+ * gcc.target/i386/pr117416-1.c: New test.
+ * gcc.target/i386/pr117416-2.c: Ditto.
+
+2024-11-05 Richard Biener <rguent...@suse.de>
+
+ PR middle-end/117433
+ * gcc.dg/pr117433.c: New testcase.
+
+2024-11-05 Levy Hsu <ad...@levyhsu.com>
+
+ * gcc.target/i386/avx10_2-comibf-1.c: New test.
+ * gcc.target/i386/avx10_2-comibf-2.c: Ditto.
+
+2024-11-05 Nathaniel Shead <nathanielosh...@gmail.com>
+
+ PR c++/99274
+ * g++.dg/modules/lambda-7.h: Skip ODR-violating declaration when
+ testing ODR deduplication.
+ * g++.dg/modules/lambda-7_b.C: Note we're testing ODR
+ deduplication.
+ * g++.dg/modules/default-arg-1_a.H: New test.
+ * g++.dg/modules/default-arg-1_b.C: New test.
+ * g++.dg/modules/default-arg-2_a.H: New test.
+ * g++.dg/modules/default-arg-2_b.C: New test.
+ * g++.dg/modules/default-arg-3.h: New test.
+ * g++.dg/modules/default-arg-3_a.H: New test.
+ * g++.dg/modules/default-arg-3_b.C: New test.
+
2024-11-04 H.J. Lu <hjl.to...@gmail.com>
PR testsuite/117300
