https://gcc.gnu.org/g:ea1f03fc6e8fed4b65c6c9748092d6b75e9e7162
commit r14-10861-gea1f03fc6e8fed4b65c6c9748092d6b75e9e7162
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Fri Nov 1 00:24:47 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 27 +++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 89 +++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 117 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 011b5c1b21f9..c5ec42d4ff96 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,30 @@
+2024-10-31 Peter Bergner <berg...@linux.ibm.com>
+
+ Backported from master:
+ 2024-08-12 Peter Bergner <berg...@linux.ibm.com>
+
+ PR target/114759
+ * config/rs6000/rs6000.cc (rs6000_override_options_after_change): Move
+ the disabling of shrink-wrapping from here....
+ * config/rs6000/rs6000-logue.cc (rs6000_emit_prologue): ...to here.
+
+2024-10-31 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-10-31 Richard Sandiford <richard.sandif...@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins-base.def (svtrn1q, svtrn2q)
+ (svuzp1q, svuzp2q, svzip1q, svzip2q): Require SM_OFF.
+
+2024-10-31 Yangyu Chen <c...@cyyself.name>
+
+ Backported from master:
+ 2024-10-30 Yangyu Chen <c...@cyyself.name>
+
+ * config/aarch64/aarch64.cc (dispatch_function_versions): Adding
+ DECL_EXTERNAL, TREE_PUBLIC and hidden DECL_VISIBILITY to
+ __init_cpu_features_resolver and __aarch64_cpu_features.
+
2024-10-30 David Malcolm <dmalc...@redhat.com>
Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index bf9a843b29c7..c47a8c6250a2 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241031
+20241101
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 80833e9394f3..0cb1829df133 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,92 @@
+2024-10-31 Peter Bergner <berg...@linux.ibm.com>
+
+ Backported from master:
+ 2024-08-12 Peter Bergner <berg...@linux.ibm.com>
+
+ PR target/114759
+ * gcc.target/powerpc/pr114759-1.c: New test.
+
+2024-10-31 Richard Sandiford <richard.sandif...@arm.com>
+
+ Backported from master:
+ 2024-10-31 Richard Sandiford <richard.sandif...@arm.com>
+
+ * g++.target/aarch64/sve/aarch64-ssve.exp: Add tests for trn[12]q,
+ uzp[12].c, and zip[12]q.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c: Skip for
+ STREAMING_COMPATIBLE.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn1q_u8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/trn2q_u8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip1q_u8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/zip2q_u8.c: Likewise.
+
2024-10-30 David Malcolm <dmalc...@redhat.com>
Backported from master:
