https://gcc.gnu.org/g:3fdb1fd699157ed7f8f9dc9101f940a8fc356051

commit r13-9066-g3fdb1fd699157ed7f8f9dc9101f940a8fc356051
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sun Sep 29 00:20:32 2024 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 88 +++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 17 ++++++++++
 3 files changed, 106 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cc6d1fd60bb2..1e75a6a5a774 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,91 @@
+2024-09-29  Jan Hubicka  <hubi...@ucw.cz>
+
+       * config/i386/x86-tune.def (X86_TUNE_AVOID_256FMA_CHAINS): Re-add 
m_ZNVER4
+       accidentally removed during znver5 merge.
+
+2024-09-29  Jan Hubicka  <j...@suse.cz>
+
+       Backported from master:
+       2024-09-03  Jan Hubicka  <j...@suse.cz>
+
+       * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): Enable for
+       znver5.
+       (X86_TUNE_AVOID_256FMA_CHAINS): Likewise.
+       (X86_TUNE_AVOID_512FMA_CHAINS): Likewise.
+
+2024-09-28  Richard Biener  <rguent...@suse.de>
+
+       Backported from master:
+       2024-07-16  Richard Biener  <rguent...@suse.de>
+
+       * config/i386/x86-tune-costs.h (znver5_cost): Update unaligned
+       load and store cost from the aligned costs.
+
+2024-09-28  Jan Hubicka  <j...@suse.cz>
+
+       Backported from master:
+       2024-03-18  Jan Hubicka  <j...@suse.cz>
+                   Karthiban Anbazhagan  <karthiban.anbazha...@amd.com>
+
+       * common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver5.
+       * common/config/i386/i386-common.cc (processor_names): Add znver5.
+       (processor_alias_table): Likewise.
+       * common/config/i386/i386-cpuinfo.h (processor_types): Add new zen
+       family.
+       (processor_subtypes): Add znver5.
+       * config.gcc (x86_64-*-* |...): Likewise.
+       * config/i386/driver-i386.cc (host_detect_local_cpu): Let
+       march=native detect znver5 cpu's.
+       * config/i386/i386-c.cc (ix86_target_macros_internal): Add
+       znver5.
+       * config/i386/i386-options.cc (m_ZNVER5): New definition
+       (processor_cost_table): Add znver5.
+       * config/i386/i386.cc (ix86_reassociation_width): Likewise.
+       * config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER5
+       (PTA_ZNVER5): New definition.
+       * config/i386/i386.md (define_attr "cpu"): Add znver5.
+       (Scheduling descriptions) Add znver5.md.
+       * config/i386/x86-tune-costs.h (znver5_cost): New definition.
+       * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver5.
+       (ix86_adjust_cost): Likewise.
+       * config/i386/x86-tune.def (avx512_move_by_pieces): Add m_ZNVER5.
+       (avx512_store_by_pieces): Add m_ZNVER5.
+       * doc/extend.texi: Add znver5.
+       * doc/invoke.texi: Likewise.
+       * config/i386/znver4.md: Rename to zn4zn5.md; combine znver4 and znver5 
Scheduler.
+       * config/i386/zn4zn5.md: New file.
+
+2024-09-28  Jan Hubicka  <j...@suse.cz>
+
+       Backported from master:
+       2024-05-14  Jan Hubicka  <j...@suse.cz>
+
+       PR ipa/113291
+       * ipa-inline.cc (enum can_inline_edge_by_limits_flags): New enum.
+       (can_inline_edge_by_limits_p): Take flags instead of multiple bools; 
add flag
+       for forcing inlinie limits.
+       (can_early_inline_edge_p): Update.
+       (want_inline_self_recursive_call_p): Update; use FORCE_LIMITS mode.
+       (check_callers): Update.
+       (update_caller_keys): Update.
+       (update_callee_keys): Update.
+       (recursive_inlining): Update.
+       (add_new_edges_to_heap): Update.
+       (speculation_useful_p): Update.
+       (inline_small_functions): Clear DECL_DISREGARD_INLINE_LIMITS on self 
recursion.
+       (flatten_function): Update.
+       (inline_to_all_callers_1): Update.
+
+2024-09-28  H.J. Lu  <hjl.to...@gmail.com>
+
+       Backported from master:
+       2024-09-25  H.J. Lu  <hjl.to...@gmail.com>
+
+       PR target/116839
+       * config/i386/i386.cc (ix86_rewrite_tls_address_1): Make it
+       static.  Return if TLS address is thread register plus an integer
+       register.
+
 2024-09-27  Stefan Schulze Frielinghaus  <stefa...@gcc.gnu.org>
 
        Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index d1c175554616..3745c09494ae 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240928
+20240929
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 90444323d8bd..373b712dc10b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2024-09-28  Jan Hubicka  <j...@suse.cz>
+
+       Backported from master:
+       2024-03-18  Jan Hubicka  <j...@suse.cz>
+                   Karthiban Anbazhagan  <karthiban.anbazha...@amd.com>
+
+       * g++.target/i386/mv29.C: Handle znver5 arch.
+       * gcc.target/i386/funcspec-56.inc:Likewise.
+
+2024-09-28  H.J. Lu  <hjl.to...@gmail.com>
+
+       Backported from master:
+       2024-09-25  H.J. Lu  <hjl.to...@gmail.com>
+
+       PR target/116839
+       * gcc.target/i386/pr116839.c: New file.
+
 2024-09-27  Stefan Schulze Frielinghaus  <stefa...@gcc.gnu.org>
 
        Backported from master:

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