https://gcc.gnu.org/g:3f1e15e885185ad63a67c7fe423d2a0b4d8da101
commit r15-2897-g3f1e15e885185ad63a67c7fe423d2a0b4d8da101
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue Aug 13 00:18:32 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 149 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/fortran/ChangeLog | 8 +++
gcc/m2/ChangeLog | 76 ++++++++++++++++++++++++
gcc/rust/ChangeLog | 11 ++++
gcc/testsuite/ChangeLog | 81 ++++++++++++++++++++++++++
6 files changed, 326 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dc976ef6d5ca..d710d126e09b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,152 @@
+2024-08-12 Peter Bergner <berg...@linux.ibm.com>
+
+ PR target/114759
+ * config/rs6000/rs6000.cc (rs6000_override_options_after_change): Move
+ the disabling of shrink-wrapping from here....
+ * config/rs6000/rs6000-logue.cc (rs6000_emit_prologue): ...to here.
+
+2024-08-12 Jeff Law <j...@ventanamicro.com>
+
+ * rtlanal.cc (subreg_regno): Update comment.
+ * final.cc (alter_subrg): Always use REGNO (SUBREG_REG ()) to get
+ the base regsiter for paradoxical subregs.
+
+2024-08-12 Manolis Tsamis <manolis.tsa...@vrull.eu>
+
+ * ifcvt.cc (need_cmov_or_rewire): Renamed init_noce_multiple_sets_info.
+ (init_noce_multiple_sets_info): Initialize noce_multiple_sets_info.
+ (noce_convert_multiple_sets_1): Use noce_multiple_sets_info and handle
+ rewiring of multiple registers.
+ (noce_convert_multiple_sets): Updated to use noce_multiple_sets_info.
+ * ifcvt.h (struct noce_multiple_sets_info): Introduce new struct
+ noce_multiple_sets_info to store info for noce_convert_multiple_sets.
+
+2024-08-12 Manolis Tsamis <manolis.tsa...@vrull.eu>
+
+ * ifcvt.cc (try_emit_cmove_seq): Modify comments.
+ (noce_convert_multiple_sets_1): Modify comments.
+ (bb_ok_for_noce_convert_multiple_sets): Allow more operations.
+
+2024-08-12 Manolis Tsamis <manolis.tsa...@vrull.eu>
+
+ * ifcvt.cc (check_for_cc_cmp_clobbers): Use modified_in_p instead.
+ (noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp.
+ Punt if seq clobbers cond. Refactor the code that sets read_comparison.
+
+2024-08-12 Georg-Johann Lay <a...@gjlay.de>
+
+ PR target/85624
+ * config/avr/avr.md (setmemhi): Set alignment to 0.
+
+2024-08-12 Joern Rennecke <joern.renne...@riscy-ip.com>
+
+ * except.cc (sjlj_emit_function_enter):
+ Set fn_begin_outside_block again if encountering a jump instruction.
+
+2024-08-12 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR other/30920
+ * splay-tree-utils.h (rooted_splay_tree::insert_relative)
+ (rooted_splay_tree::lookup_le): New functions.
+ (rooted_splay_tree::remove_root_and_splay_next): Likewise.
+ * splay-tree-utils.tcc (rooted_splay_tree::insert_relative): New
+ function, extracted from...
+ (rooted_splay_tree::insert): ...here.
+ (rooted_splay_tree::lookup_le): New function.
+ (rooted_splay_tree::remove_root_and_splay_next): Likewise.
+ * tree-ssa-sccvn.cc (pd_range::m_children): New member variable.
+ (vn_walk_cb_data::vn_walk_cb_data): Initialize first_range.
+ (vn_walk_cb_data::known_ranges): Use a default_splay_tree.
+ (vn_walk_cb_data::~vn_walk_cb_data): Remove freeing of known_ranges.
+ (pd_range_compare, pd_range_alloc, pd_range_dealloc): Delete.
+ (vn_walk_cb_data::push_partial_def): Rewrite splay tree operations
+ to use splay-tree-utils.h.
+ * rtl-ssa/accesses.cc (function_info::add_use): Use insert_relative.
+
+2024-08-12 Kyrylo Tkachov <ktkac...@nvidia.com>
+
+ * config/aarch64/aarch64-simd.md
+ (aarch64_simd_imm_shl<mode><vczle><vczbe>): Rewrite to new
+ syntax. Add =w,w,vs1 alternative.
+ * config/aarch64/constraints.md (vs1): New constraint.
+
+2024-08-12 Haochen Jiang <haochen.ji...@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_available_features): Handle
+ avx10.2.
+ * common/config/i386/i386-common.cc
+ (OPTION_MASK_ISA2_AVX10_2_256_SET): New.
+ (OPTION_MASK_ISA2_AVX10_2_512_SET): Ditto.
+ (OPTION_MASK_ISA2_AVX10_1_256_UNSET):
+ Add OPTION_MASK_ISA2_AVX10_2_256_UNSET.
+ (OPTION_MASK_ISA2_AVX10_1_512_UNSET):
+ Add OPTION_MASK_ISA2_AVX10_2_512_UNSET.
+ (OPTION_MASK_ISA2_AVX10_2_256_UNSET): New.
+ (OPTION_MASK_ISA2_AVX10_2_512_UNSET): Ditto.
+ (ix86_handle_option): Handle avx10.2-256 and avx10.2-512.
+ * common/config/i386/i386-cpuinfo.h (enum processor_features):
+ Add FEATURE_AVX10_2_256 and FEATURE_AVX10_2_512.
+ * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY for
+ avx10.2-256 and avx10.2-512.
+ * config/i386/i386-c.cc (ix86_target_macros_internal): Define
+ __AVX10_2_256__ and __AVX10_2_512__.
+ * config/i386/i386-isa.def (AVX10_2): Add DEF_PTA(AVX10_2_256)
+ and DEF_PTA(AVX10_2_512).
+ * config/i386/i386-options.cc (isa2_opts): Add -mavx10.2-256 and
+ -mavx10.2-512.
+ (ix86_valid_target_attribute_inner_p): Handle avx10.2-256 and
+ avx10.2-512.
+ * config/i386/i386.opt: Add option -mavx10.2, -mavx10.2-256 and
+ -mavx10.2-512.
+ * config/i386/i386.opt.urls: Regenerated.
+ * doc/extend.texi: Document avx10.2, avx10.2-256 and avx10.2-512.
+ * doc/invoke.texi: Document -mavx10.2, -mavx10.2-256 and
+ -mavx10.2-512.
+ * doc/sourcebuild.texi: Document target avx10.2, avx10.2-256,
+ avx10.2-512.
+
+2024-08-12 Roger Sayle <ro...@nextmovesoftware.com>
+
+ PR target/116275
+ * config/i386/i386.md (*extendv2di2_highpart_stv_noavx512vl): New
+ define_insn_and_split to handle the STV conversion of the DImode
+ pattern *extendsi2_doubleword_highpart.
+
+2024-08-12 Lulu Cheng <chengl...@loongson.cn>
+
+ * config/loongarch/loongarch.md (insn): Added rotatert rotr pairs.
+ * config/loongarch/simd.md (rotr<mode>3): Remove to ...
+ (<optab><mode>3): This.
+
+2024-08-12 Lulu Cheng <chengl...@loongson.cn>
+
+ PR target/114189
+ * config/loongarch/lasx.md (vcondu<LASX:mode><ILASX:mode>): Delete.
+ (vcond<LASX:mode><LASX_2:mode>): Likewise.
+ * config/loongarch/lsx.md (vcondu<LSX:mode><ILSX:mode>): Likewise.
+ (vcond<LSX:mode><LSX_2:mode>): Likewise.
+
+2024-08-12 Lulu Cheng <chengl...@loongson.cn>
+
+ * config/loongarch/lasx.md (xvandn<mode>3): Rename to ...
+ (andn<mode>3): This.
+ (xvorn<mode>3): Rename to ...
+ (iorn<mode>3): This.
+ * config/loongarch/loongarch-builtins.cc
+ (CODE_FOR_lsx_vandn_v): Defined as the modified name.
+ (CODE_FOR_lsx_vorn_v): Likewise.
+ (CODE_FOR_lasx_xvandn_v): Likewise.
+ (CODE_FOR_lasx_xvorn_v): Likewise.
+ (loongarch_expand_builtin_insn): When the builtin function to be
+ called is __builtin_lasx_xvandn or __builtin_lsx_vandn, swap the
+ two operands.
+ * config/loongarch/loongarch.md (<optab>n<mode>): Rename to ...
+ (<optab>n<mode>3): This.
+ * config/loongarch/lsx.md (vandn<mode>3): Rename to ...
+ (andn<mode>3): This.
+ (vorn<mode>3): Rename to ...
+ (iorn<mode>3): This.
+
2024-08-11 Georg-Johann Lay <a...@gjlay.de>
* config/avr/avr.opt (mlra): Set Undocumented flag.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 2454f4b3e286..e2b84f6ebd89 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240812
+20240813
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index ae1b6883e349..2d23825b92a9 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,11 @@
+2024-08-12 Andre Vehreschild <ve...@gcc.gnu.org>
+
+ PR fortran/85510
+ * resolve.cc (resolve_variable): Mark the variable as host
+ associated only, when it is not in an associate block.
+ * trans-decl.cc (generate_coarray_init): Remove incorrect unused
+ flag on parameter.
+
2024-08-11 Harald Anlauf <anl...@gmx.de>
PR fortran/116221
diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog
index 840adc5edda5..b7a55da05a7d 100644
--- a/gcc/m2/ChangeLog
+++ b/gcc/m2/ChangeLog
@@ -1,3 +1,79 @@
+2024-08-12 Gaius Mulley <gaiusm...@gmail.com>
+
+ PR modula2/116181
+ * gm2-compiler/ppg.mod (FindStr): Initialize j.
+ * gm2-libs-ch/UnixArgs.cc (_M2_UnixArgs_ctor): Replace
+ M2RTS_RegisterModule with M2RTS_RegisterModule_Cstr.
+ * gm2-libs-ch/dtoa.cc (_M2_dtoa_ctor): Ditto.
+ * gm2-libs-ch/ldtoa.cc (ldtoa_strtold): Cast parameter s
+ for strtod.
+ (_M2_ldtoa_ctor): Replace M2RTS_RegisterModule with
+ M2RTS_RegisterModule_Cstr.
+ * gm2-libs-ch/m2rts.h (M2RTS_RegisterModule_Cstr): New
+ define.
+ (M2RTS_RegisterModule): Remove const.
+ * mc-boot-ch/GSelective.c (Selective_FdIsSet): Return bool
+ rather than int.
+ * mc-boot-ch/Gldtoa.cc (ldtoa_strtold): Change const char to
+ void.
+ Cast s before passing as a parameter to strtod.
+ * mc-boot-ch/Glibc.c (tracedb_open): Replace const char with const
+ void.
+ (libc_perror): Replace char with const char.
+ (libc_printf): Replace char with void.
+ (libc_snprintf): Replace char with void.
+ Add const_cast for parameter to index.
+ Add reinterpret_cast for parameter to vsnprintf.
+ (libc_open): Replace first paramter type char with void.
+ Add vararg for the third parameter.
+ * mc-boot-ch/Gm2rtsdummy.cc (M2RTS_RequestDependant): Remove #if 0 code.
+ (m2pim_M2RTS_RegisterModule): Change const char parameters to void
+ (M2RTS_RegisterModule): Ditto.
+ (_M2_M2RTS_init): Remove #if 0 code.
+ (M2RTS_ConstructModules): Ditto.
+ (M2RTS_Terminate): Ditto.
+ (M2RTS_DeconstructModules): Ditto.
+ (M2RTS_Halt): Ditto.
+ * mc-boot-ch/Gtermios.cc (SetFlag): Return bool.
+ * mc-boot-ch/m2rts.h (M2RTS_RegisterModule_Cstr): New define.
+ (M2RTS_RegisterModule): Change const char parameters to void.
+ * mc-boot/Gdecl.cc: Regenerate.
+ * mc/decl.mod (getNextConstExp): Reimplement.
+ * pge-boot/GDynamicStrings.cc: Regenerate.
+ * pge-boot/GDynamicStrings.h: Ditto.
+ * pge-boot/GM2RTS.h (M2RTS_RegisterModule_Cstr): New function.
+ (M2RTS_RegisterModule): Reformat.
+ * pge-boot/GSymbolKey.cc: Regenerate.
+ * pge-boot/GSysExceptions.cc (_M2_SysExceptions_init): Add correct
parameters.
+ (_M2_SysExceptions_fini): Ditto.
+ * pge-boot/GUnixArgs.cc (_M2_UnixArgs_ctor::_M2_UnixArgs_ctor):
+ Replace call to M2RTS_RegisterModule with M2RTS_RegisterModuleCstr.
+ * pge-boot/Gerrno.cc (_M2_errno_init): Add correct parameters.
+ (_M2_errno_fini): Ditto.
+ * pge-boot/Gldtoa.cc (ldtoa_strtold): Replace const char with
+ void.
+ Use reinterpret_cast when passing s to strtod.
+ Replace true with TRUE.
+ * pge-boot/Gldtoa.h (ldtoa_strtold): Tidy up.
+ * pge-boot/Glibc.cc (libc_read): Use size_t as the return type.
+ (libc_write): Ditto.
+ (libc_strlen): Ditto.
+ (libc_perror): Replace char with const char.
+ (libc_printf): Replace char to const char.
+ Cast parameter to index using const_cast.
+ (libc_snprintf): Replace char with void.
+ Cast parameter to index using const_cast.
+ (libc_malloc): Replace parameter type with size_t.
+ (libc_memcpy): Replace third parameter type with size_t.
+ (libc_open): Use varargs.
+ * pge-boot/Glibc.h (libc_perror): Add _string_high parameter.
+ * pge-boot/Gpge.cc: Regenerate.
+ * pge-boot/Gtermios.cc (SetFlag): Replace return type with bool.
+ (_M2_termios_init): Add correct parameters.
+ (_M2_termios_fini): Ditto.
+ * pge-boot/m2rts.h (M2RTS_RegisterModule_Cstr): New define.
+ (M2RTS_RegisterModule): Replace const char with void.
+
2024-08-10 Wilken Gottwalt <wilken.gottw...@posteo.net>
* gm2-libs-iso/MemStream.mod: Guard debug output.
diff --git a/gcc/rust/ChangeLog b/gcc/rust/ChangeLog
index 706055274245..6c88d4d3dfe5 100644
--- a/gcc/rust/ChangeLog
+++ b/gcc/rust/ChangeLog
@@ -1,3 +1,14 @@
+2024-08-12 Arthur Cohen <arthur.co...@embecosm.com>
+
+ * checks/errors/borrowck/rust-bir-builder.h: Cast size_t values to
unsigned
+ long before printing.
+ * checks/errors/borrowck/rust-bir-fact-collector.h: Likewise.
+
+2024-08-12 Arthur Cohen <arthur.co...@embecosm.com>
+
+ * checks/errors/borrowck/rust-bir-fact-collector.h (points): Rename
+ `push_subset(PlaceId, PlaceId)` to `push_subset_place(PlaceId, PlaceId)`
+
2024-08-05 Thomas Schwinge <tschwi...@baylibre.com>
* Make-lang.in (RUST_LIBDEPS): Inline into all users.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0bc51c250a15..423fc606bcd3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,84 @@
+2024-08-12 Peter Bergner <berg...@linux.ibm.com>
+
+ PR target/114759
+ * gcc.target/powerpc/pr114759-1.c: New test.
+
+2024-08-12 Edwin Lu <e...@rivosinc.com>
+
+ * gcc.target/riscv/rvv/base/pr116202-run-1.c: Add mabi arg
+
+2024-08-12 Jeff Law <j...@ventanamicro.com>
+
+ * g++.target/m68k/m68k.exp: New test driver.
+ * g++.target/m68k/pr116244.C: New test.
+
+2024-08-12 Manolis Tsamis <manolis.tsa...@vrull.eu>
+
+ * gcc.target/aarch64/ifcvt_multiple_sets_rewire.c: New test.
+
+2024-08-12 Manolis Tsamis <manolis.tsa...@vrull.eu>
+
+ * gcc.target/aarch64/ifcvt_multiple_sets_arithm.c: New test.
+
+2024-08-12 Georg-Johann Lay <a...@gjlay.de>
+
+ PR target/85624
+ * gcc.target/avr/torture/pr85624.c: New test.
+
+2024-08-12 Joern Rennecke <joern.renne...@riscy-ip.com>
+
+ * gcc.c-torture/execute/20021120-1.c: Skip if not size20plus or -Os.
+ * gcc.dg/fixed-point/convert-float-4.c: Require size20plus.
+ * gcc.dg/torture/pr112282.c: Skip if -O0 unless size20plus.
+ * g++.dg/lookup/pr21802.C: Require size20plus.
+
+2024-08-12 Joern Rennecke <joern.renne...@riscy-ip.com>
+
+ * gcc.dg/pr107523.c: Make sure variables can fit numbers.
+ * gcc.dg/pr47893.c: Add dg-require-effective-target size20plus clause.
+ * c-c++-common/torture/builtin-clear-padding-2.c:
+ dg-require-effective-target size20plus.
+ * gcc.dg/pr115646.c: dg-require-effective-target int32plus.
+ * c-c++-common/analyzer/coreutils-sum-pr108666.c:
+ For c++, expect a warning about exceeding maximum object size
+ if not size20plus.
+ * gcc.dg/torture/inline-mem-cpy-1.c:
+ Like the included file, dg-require-effective-target ptr32plus.
+ * gcc.dg/torture/inline-mem-cmp-1.c: Likewise.
+
+2024-08-12 Kyrylo Tkachov <ktkac...@nvidia.com>
+
+ * gcc.target/aarch64/advsimd_shl_add.c: New test.
+
+2024-08-12 Andre Vehreschild <ve...@gcc.gnu.org>
+
+ PR fortran/85510
+ * gfortran.dg/coarray/pr85510.f90: New test.
+
+2024-08-12 Haochen Jiang <haochen.ji...@intel.com>
+
+ * g++.dg/other/i386-2.C: Ditto.
+ * g++.dg/other/i386-3.C: Ditto.
+ * gcc.target/i386/sse-12.c: Ditto.
+ * gcc.target/i386/sse-13.c: Ditto.
+ * gcc.target/i386/sse-14.c: Ditto.
+ * gcc.target/i386/sse-22.c: Ditto.
+ * gcc.target/i386/sse-23.c: Ditto.
+
+2024-08-12 Roger Sayle <ro...@nextmovesoftware.com>
+
+ PR target/116275
+ * g++.target/i386/pr116275.C: New test case.
+
+2024-08-12 Lulu Cheng <chengl...@loongson.cn>
+
+ * g++.target/loongarch/vect-ashr-lshr.C: New test.
+
+2024-08-12 Lulu Cheng <chengl...@loongson.cn>
+
+ * gcc.target/loongarch/lasx-andn-iorn.c: New test.
+ * gcc.target/loongarch/lsx-andn-iorn.c: New test.
+
2024-08-10 Xi Ruoyao <xry...@xry111.site>
PR testsuite/70150
