https://gcc.gnu.org/g:22c62d33ecb78f9166996f7b93a18bd0af90b655

commit r15-2462-g22c62d33ecb78f9166996f7b93a18bd0af90b655
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Thu Aug 1 00:19:03 2024 +0000

    Daily bump.

Diff:
---
 ChangeLog               |   5 ++
 gcc/ChangeLog           | 179 ++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/cp/ChangeLog        |   6 ++
 gcc/testsuite/ChangeLog | 113 ++++++++++++++++++++++++++++++
 libgomp/ChangeLog       |   9 +++
 libstdc++-v3/ChangeLog  | 134 ++++++++++++++++++++++++++++++++++++
 7 files changed, 447 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 25fbbb57f212..4b668faa6f42 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2024-07-31  Arsen Arsenović  <ar...@aarsen.me>
+
+       * .dir-locals.el: Change c-mode to a list of C, C++ and ObjC
+       modes that Emacs currently provides.
+
 2024-07-28  Jonathan Wakely  <jwak...@redhat.com>
 
        * .b4-config: New file.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 197667960b60..3d75a128708f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,182 @@
+2024-07-31  Andrew Pinski  <quic_apin...@quicinc.com>
+
+       PR middle-end/116134
+       * match.pd (`(a ? x : y) eq/ne (b ? x : y)`): Check that
+       a and b types match.
+       (`(a ? x : y) eq/ne (b ? y : x)`): Likewise.
+
+2024-07-31  Jeff Law  <j...@ventanamicro.com>
+
+       * ext-dce.cc (carry_backpropagate): Change more guards of [U]INTVAL to
+       test CONST_INT_P rather than CONSTANT_P, fixing rtl-checking failures.
+
+2024-07-31  Dimitar Dimitrov  <dimi...@dinux.eu>
+
+       * common/config/pru/pru-common.cc
+       (TARGET_OPTION_OPTIMIZATION_TABLE): New definition.
+       * config/pru/pru.cc (TARGET_MIN_ANCHOR_OFFSET): Set minimal
+       anchor offset.
+       (TARGET_MAX_ANCHOR_OFFSET): Set maximum anchor offset.
+
+2024-07-31  Jeff Law  <j...@ventanamicro.com>
+
+       PR rtl-optimization/116136
+       * simplify-rtx.cc (simplify_context::simplify_subreg): Check
+       that we're working with the lowpart offset rather than byte 0.
+
+2024-07-31  Claudio Bantaloukas  <claudio.bantalou...@arm.com>
+
+       * config.gcc (extra_headers): Install arm_private_fp8.h.
+       * config/aarch64/arm_neon.h: Include arm_private_fp8.h.
+       * config/aarch64/arm_sve.h: Likewise.
+       * config/aarch64/arm_private_fp8.h: New file
+       (fpm_t): New type representing fpmr values.
+       (enum __ARM_FPM_FORMAT): New enum representing valid fp8 formats.
+       (enum __ARM_FPM_OVERFLOW): New enum representing how some fp8
+       calculations work.
+       (__arm_fpm_init): New.
+       (__arm_set_fpm_src1_format): Likewise.
+       (__arm_set_fpm_src2_format): Likewise.
+       (__arm_set_fpm_dst_format): Likewise.
+       (__arm_set_fpm_overflow_cvt): Likewise.
+       (__arm_set_fpm_overflow_mul): Likewise.
+       (__arm_set_fpm_lscale): Likewise.
+       (__arm_set_fpm_lscale2): Likewise.
+       (__arm_set_fpm_nscale): Likewise.
+
+2024-07-31  Claudio Bantaloukas  <claudio.bantalou...@arm.com>
+
+       * config/aarch64/aarch64.cc (aarch64_hard_regno_nregs): Add
+       support for MOVEABLE_SYSREGS class.
+       (aarch64_hard_regno_mode_ok): Allow reads and writes to fpmr.
+       (aarch64_regno_regclass): Support MOVEABLE_SYSREGS class.
+       (aarch64_class_max_nregs): Likewise.
+       * config/aarch64/aarch64.h (FIXED_REGISTERS): add fpmr.
+       (CALL_REALLY_USED_REGISTERS): Likewise.
+       (REGISTER_NAMES): Likewise.
+       (enum reg_class): Add MOVEABLE_SYSREGS class.
+       (REG_CLASS_NAMES): Likewise.
+       (REG_CLASS_CONTENTS): Update class bitmaps to deal with fpmr,
+       the new MOVEABLE_REGS class and renumbering of registers.
+       * config/aarch64/aarch64.md: (FPM_REGNUM): added new register
+       number, reusing old value.
+       (FFR_REGNUM): Renumber.
+       (FFRT_REGNUM): Likewise.
+       (LOWERING_REGNUM): Likewise.
+       (TPIDR2_BLOCK_REGNUM): Likewise.
+       (SME_STATE_REGNUM): Likewise.
+       (TPIDR2_SETUP_REGNUM): Likewise.
+       (ZA_FREE_REGNUM): Likewise.
+       (ZA_SAVED_REGNUM): Likewise.
+       (ZA_REGNUM): Likewise.
+       (ZT0_REGNUM): Likewise.
+       (*mov<mode>_aarch64): Add support for moveable sysregs.
+       (*movsi_aarch64): Likewise.
+       (*movdi_aarch64): Likewise.
+       * config/aarch64/constraints.md (MOVEABLE_SYSREGS): New constraint.
+
+2024-07-31  Claudio Bantaloukas  <claudio.bantalou...@arm.com>
+
+       * config/aarch64/aarch64-option-extensions.def (fp8): New.
+       * config/aarch64/aarch64.h (TARGET_FP8): Likewise.
+       * doc/invoke.texi (AArch64 Options): Document new -march flags
+       and extensions.
+
+2024-07-31  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/loongarch.md (UNSPEC_REVB_2H, UNSPEC_REVB_4H,
+       UNSPEC_REVH_D): Remove UNSPECs.
+       (revb_4h, revh_d): Remove define_insn.
+       (revb_2h): Define as (rotatert:SI (bswap:SI x) 16) instead of
+       an UNSPEC.
+       (revb_2h_extend, revb_2w, *bswapsi2, bswapdi2): New define_insn.
+       (bswapsi2): Change to define_expand.  Only expand to revb.2h +
+       rotri.w if !TARGET_64BIT.
+       (bswapdi2): Change to define_insn of which the output is just a
+       revb.d instruction.
+
+2024-07-31  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/predicates.md (ins_zero_bitmask_operand):
+       Cover more cases that bstrins can benefit.
+       (high_bitmask_operand): Remove.
+       * config/loongarch/constraints.md (Yy): Remove.
+       * config/loongarch/loongarch.md (and<mode>3_align): Remove.
+
+2024-07-31  Richard Biener  <rguent...@suse.de>
+
+       PR middle-end/101478
+       * gimplify.cc (gimplify_addr_expr): Check we still have an
+       ADDR_EXPR before calling recompute_tree_invariant_for_addr_expr.
+
+2024-07-31  Hongyu Wang  <hongyu.w...@intel.com>
+
+       PR target/116065
+       * config/i386/i386.opt (munroll-only-small-loops): Mark as
+       Optimization instead of Save.
+
+2024-07-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR rtl-optimization/115881
+       * recog.cc: Include rtl-iter.h.
+       (insn_propagation::apply_to_rvalue_1): Check that the result
+       of simplify_subreg does not include nested subregs.
+
+2024-07-31  Kewen Lin  <li...@linux.ibm.com>
+
+       PR target/105359
+       * config/rs6000/rs6000.md (@extenddf<FLOAT128:mode>2): Don't check
+       TARGET_LONG_DOUBLE_128 for FLOAT128_IEEE_P modes.
+       (extendsf<FLOAT128:mode>2): Likewise.
+       (trunc<FLOAT128:mode>df2): Likewise.
+       (trunc<FLOAT128:mode>sf2): Likewise.
+       (floatsi<FLOAT128:mode>2): Likewise.
+       (fix_trunc<FLOAT128:mode>si2): Likewise.
+
+2024-07-31  Kewen Lin  <li...@linux.ibm.com>
+
+       * config/rs6000/altivec.md (p9_vadu<mode>3): Rename to ...
+       (uabd<mode>3): ... this.  Update RTL pattern with umin and umax rather
+       than UNSPEC_VADU.
+       (vadu<mode>3): Remove.
+       (UNSPEC_VADU): Remove.
+       (usadv16qi): Replace gen_p9_vaduv16qi3 with gen_uabdv16qi3.
+       (usadv8hi): Replace gen_p9_vaduv8hi3 with gen_uabdv8hi3.
+       * config/rs6000/rs6000-builtins.def (__builtin_altivec_vadub): Replace
+       expander with uabdv16qi3.
+       (__builtin_altivec_vaduh): Adjust expander with uabdv8hi3.
+       (__builtin_altivec_vaduw): Adjust expander with uabdv4si3.
+
+2024-07-31  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/loongarch.md (optab): Add (rotatert "rotr").
+       (<optab:any_shift><mode>3, <optab:any_div><mode>3,
+       sub<mode>3, rotr<mode>3, mul<mode>3): Add a "*" to the insn name
+       so we can redefine the names with define_expand.
+       (*<optab:any_shift>si3_extend): Remove "*" so we can use them
+       in expanders.
+       (*subsi3_extended, *mulsi3_extended): Likewise, also remove the
+       trailing "ed" for consistency.
+       (*<optab:any_div>si3_extended): Add mode for sign_extend to
+       prevent an ICE using it in expanders.
+       (shift_w, arith_w): New define_code_iterator.
+       (<optab:any_w><mode>3): New define_expand.  Expand with
+       <optab:any_w>si3_extend for SImode if TARGET_64BIT.
+       (<optab:arith_w><mode>3): Likewise.
+       (mul<mode>3): Expand to mulsi3_extended for SImode if
+       TARGET_64BIT and ISA_HAS_DIV32.
+       (<optab:any_div><mode>3): Expand to <optab:any_div>si3_extended
+       for SImode if TARGET_64BIT.
+       (rotl<mode>3): Expand to rotrsi3_extend for SImode if
+       TARGET_64BIT.
+       (bytepick_w_<bytepick_imm>): Add mode for lshiftrt and ashift.
+       (bitsize, bytepick_imm, bytepick_w_ashift_amount): New
+       define_mode_attr.
+       (bytepick_w_<bytepick_imm>_extend): Adjust for the RTL change
+       caused by 32-bit shift expanding.  Now bytepick_imm only covers
+       2 and 3, separate one remaining case to ...
+       (bytepick_w_1_extend): ... here, new define_insn.
+
 2024-07-30  Edwin Lu  <e...@rivosinc.com>
 
        * common/config/riscv/riscv-common.cc (riscv_subset_list::to_string):
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index e2dab5541a03..5b64322fc602 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240731
+20240801
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index e05e79d50139..eff18919deb5 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,9 @@
+2024-07-31  Marek Polacek  <pola...@redhat.com>
+
+       PR c++/115645
+       * init.cc (build_vec_init): When initializing a scalar type, try to
+       create a constant initializer.
+
 2024-07-30  Arsen Arsenović  <ar...@aarsen.me>
 
        PR c++/115906
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5afe9167ef9d..458651b6adc0 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,116 @@
+2024-07-31  Jerry DeLisle  <jvdeli...@gcc.gnu.org>
+
+       PR libfortran/105361
+       * gfortran.dg/pr105361.f90: Add newline character to test
+       input to provide more compliant test.
+
+2024-07-31  Andrew Pinski  <quic_apin...@quicinc.com>
+
+       PR middle-end/116134
+       * gcc.dg/torture/pr116134-1.c: New test.
+
+2024-07-31  Dimitar Dimitrov  <dimi...@dinux.eu>
+
+       * gcc.target/pru/section-anchors-1.c: New test.
+       * gcc.target/pru/section-anchors-2.c: New test.
+
+2024-07-31  Dimitar Dimitrov  <dimi...@dinux.eu>
+
+       PR testsuite/116154
+       * gcc.dg/torture/pr67947.c: Use volatile variable instead of
+       argc.
+
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       * gcc.dg/tree-prof/crossmodule-indir-call-topn-1.c: Fix 
dg-require-profiling
+       directive order.
+       * gcc.dg/tree-prof/crossmodule-indir-call-topn-2.c: Likewise.
+
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       * gcc.target/aarch64/aapcs64/func-ret-3.c: Fix 
dg-require-effective-target directive order.
+       * gcc.target/aarch64/aapcs64/func-ret-4.c: Likewise.
+       * gfortran.dg/PR100914.f90: Likewise.
+
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       PR target/106828
+       * g++.target/loongarch/pr106828.C: Fix 'dg-do compile' typo.
+
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       PR target/69194
+       PR c++/92024
+       PR c++/110057
+       * c-c++-common/Wshadow-1.c: Fix 'dg-do compile' typo.
+       * g++.dg/tree-ssa/devirt-array-destructor-1.C: Likewise.
+       * g++.dg/tree-ssa/devirt-array-destructor-2.C: Likewise.
+       * gcc.target/arm/pr69194.c: Likewise.
+
+2024-07-31  Claudio Bantaloukas  <claudio.bantalou...@arm.com>
+
+       * gcc.target/aarch64/acle/fp8-helpers-neon.c: New test of fpmr helper
+       functions.
+       * gcc.target/aarch64/acle/fp8-helpers-sve.c: New test of fpmr helper
+       functions presence.
+       * gcc.target/aarch64/acle/fp8-helpers-sme.c: New test of fpmr helper
+       functions presence.
+
+2024-07-31  Claudio Bantaloukas  <claudio.bantalou...@arm.com>
+
+       * gcc.target/aarch64/acle/fp8.c: New tests.
+
+2024-07-31  Claudio Bantaloukas  <claudio.bantalou...@arm.com>
+
+       * gcc.target/aarch64/acle/fp8.c: New test.
+
+2024-07-31  Marek Polacek  <pola...@redhat.com>
+
+       PR c++/115645
+       * g++.dg/cpp2a/constexpr-new23.C: New test.
+
+2024-07-31  Filip Kastl  <fka...@suse.cz>
+
+       * gcc.target/i386/switch-exp-transform-3.c: Set the long long
+       int test to only execute with 64bit targets.
+
+2024-07-31  Xi Ruoyao  <xry...@xry111.site>
+
+       * gcc.target/loongarch/revb.c: New test.
+
+2024-07-31  Xi Ruoyao  <xry...@xry111.site>
+
+       * gcc.target/loongarch/bstrins-4.c: New test.
+
+2024-07-31  Richard Biener  <rguent...@suse.de>
+
+       PR middle-end/101478
+       * gcc.dg/pr101478.c: New testcase.
+
+2024-07-31  Hongyu Wang  <hongyu.w...@intel.com>
+
+       PR target/116065
+       * gcc.target/i386/pr116065.c: New test.
+
+2024-07-31  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR rtl-optimization/115881
+       * gcc.c-torture/compile/pr115881.c: New test.
+
+2024-07-31  Kewen Lin  <li...@linux.ibm.com>
+
+       PR target/105359
+       * gcc.target/powerpc/pr79004.c: Remove xfails.
+
+2024-07-31  Kewen Lin  <li...@linux.ibm.com>
+
+       * gcc.target/powerpc/abd-vectorize-1.c: New test.
+       * gcc.target/powerpc/abd-vectorize-2.c: New test.
+
+2024-07-31  Xi Ruoyao  <xry...@xry111.site>
+
+       * gcc.target/loongarch/bitwise_extend.c: New test.
+
 2024-07-30  Sam James  <s...@gentoo.org>
 
        PR target/68015
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 73dc102348c8..11dd34efc7d6 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,12 @@
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       * testsuite/libgomp.c++/pr24455.C: Fix dg-require-effective-target 
directive order.
+       * testsuite/libgomp.c/pr24455.c: Likewise.
+
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       * testsuite/libgomp.c++/declare-target-indirect-1.C: Fix 'dg-run' typo.
+
 2024-07-29  Tobias Burnus  <tbur...@baylibre.com>
 
        * libgomp.texi (OpenMP Runtime Library Routines): Add missing
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index acfc04d83843..44c496b8e74a 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,137 @@
+2024-07-31  François Dumont  <frs.dum...@gmail.com>
+
+       * testsuite/23_containers/map/operators/1_neg.cc (test01): Add test 
variable
+       declaration.
+       * testsuite/23_containers/set/operators/1_neg.cc (test01): Likewise.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       * src/c++20/format.cc [!_GLIBCXX_HAS_GTHREADS] (mutex): Define
+       dummy mutex type.
+       * testsuite/std/time/format_localized.cc: Use loop variable
+       instead of creating the same locale on every iteration.
+
+2024-07-31  Sam James  <s...@gentoo.org>
+
+       * testsuite/28_regex/traits/char/translate.cc: Drop bogus 'dg_do run'.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       * src/c++11/system_error.cc (strerror_string): Handle
+       non-conforming NULL return from strerror.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       * testsuite/lib/libstdc++.exp (check_v3_target_namedlocale):
+       Only append "@euro" to ".ISO8859-15" locales for Glibc.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       * include/bits/version.def (format): Update value for C++26.
+       * include/bits/version.h: Regenerate.
+       * include/std/format (runtime_format, wruntime_format): Check
+       __cpp_lib_format instead of __cplusplus.
+       * testsuite/std/format/functions/format.cc: Update expected
+       value of macro for C++26 mode.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       PR libstdc++/110356
+       * include/bits/c++config (_GLIBCXX26_DEPRECATED): Define.
+       (_GLIBCXX26_DEPRECATED_SUGGEST): Define.
+       * include/bits/version.def (format): Update for C++26.
+       * include/bits/version.h: Regenerate.
+       * include/std/format (basic_format_arg::visit): New member
+       functions.
+       (visit_format_arg): Add deprecated attribute.
+       * testsuite/std/format/arguments/args.cc: Expect deprecated
+       warnings. Check member visit.
+       * testsuite/std/format/functions/format.cc: Update expected
+       value for __cpp_lib_format macro.
+       * testsuite/std/format/parse_ctx.cc: Add dg-warning for
+       deprecation.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       PR libstdc++/110356
+       * include/bits/version.def (variant): Update for C++26.
+       * include/bits/version.h: Regenerate.
+       * include/std/variant (variant::visit): New member functions.
+       * testsuite/20_util/variant/visit.cc: Check second alternative.
+       * testsuite/20_util/variant/visit_member.cc: New test.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       PR libstdc++/115776
+       * include/bits/version.def (format): Update for C++26.
+       * include/bits/version.h: Regenerate.
+       * include/std/format (basic_format_parse_context): Remove
+       default argument from constructor and split into two
+       constructors. Make the constructor taking size_t private for
+       C++26 and later.
+       (basic_format_parse_context::check_dynamic_spec): New member
+       function template.
+       (basic_format_parse_context::check_dynamic_spec_integral): New
+       member function.
+       (basic_format_parse_context::check_dynamic_spec_string):
+       Likewise.
+       (__format::_Spec::_S_parse_width_or_precision): Use
+       check_dynamic_spec_integral.
+       (__format::__to_arg_t_enum): New helper function.
+       (basic_format_arg):  Declare __to_arg_t_enum as friend.
+       (__format::_Scanner): Define and use a derived parse context
+       type.
+       (__format::_Checking_scanner): Make arg types available to parse
+       context.
+       * testsuite/std/format/functions/format.cc: Check for new values
+       of __cpp_lib_format macro.
+       * testsuite/std/format/parse_ctx.cc: Check all members of
+       basic_format_parse_context.
+       * testsuite/std/format/parse_ctx_neg.cc: New test.
+       * testsuite/std/format/string.cc: Add more checks for dynamic
+       width and precision args.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       * include/bits/version.def (format): Update value for P2510R3.
+       * include/bits/version.h: Regenerate.
+       * include/std/format (_GLIBCXX_P2518R3): Remove misspelled macro
+       and check __glibcxx_format instead.
+       * testsuite/std/format/functions/format.cc: Check value of the
+       __cpp_lib_format macro for formatting pointers support.
+       * testsuite/std/format/parse_ctx.cc: Likewise.
+
+2024-07-31  Jonathan Wakely  <jwak...@redhat.com>
+
+       PR libstdc++/109162
+       * acinclude.m4 (libtool_VERSION): Update to 6:34:0.
+       * config/abi/pre/gnu.ver: Disambiguate old patters. Add new
+       GLIBCXX_3.4.34 symbol version and new exports.
+       * configure: Regenerate.
+       * include/bits/chrono_io.h (_ChronoSpec::_M_locale_specific):
+       Add new accessor functions to use a reserved bit in _Spec.
+       (__formatter_chrono::_M_parse): Use _M_locale_specific(true)
+       when chrono-specs contains locale-dependent conversion
+       specifiers.
+       (__formatter_chrono::_M_format): Open iconv descriptor if
+       conversion to UTF-8 will be needed.
+       (__formatter_chrono::_M_write): New function to write a
+       localized string with possible character conversion.
+       (__formatter_chrono::_M_a_A, __formatter_chrono::_M_b_B)
+       (__formatter_chrono::_M_p, __formatter_chrono::_M_r)
+       (__formatter_chrono::_M_x, __formatter_chrono::_M_X)
+       (__formatter_chrono::_M_locale_fmt): Use _M_write.
+       * include/bits/version.def (format): Update value.
+       * include/bits/version.h: Regenerate.
+       * include/std/format (_GLIBCXX_P2518R3): Check feature test
+       macro instead of __cplusplus.
+       (basic_format_context): Declare __formatter_chrono as friend.
+       * src/c++20/Makefile.am: Add new file.
+       * src/c++20/Makefile.in: Regenerate.
+       * src/c++20/format.cc: New file.
+       * testsuite/std/time/format_localized.cc: New test.
+       * testsuite/util/testsuite_abi.cc: Add new symbol version.
+
 2024-07-30  Jonathan Wakely  <jwak...@redhat.com>
 
        * include/bits/chrono_io.h (__local_time_fmt_for): New alias

Reply via email to