https://gcc.gnu.org/g:ae1f6eba16c9daa6e71425d79c0b35028063ca6d
commit r13-8879-gae1f6eba16c9daa6e71425d79c0b35028063ca6d
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Sat Jun 29 00:22:14 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 43 +++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 11 +++++++++++
libstdc++-v3/ChangeLog | 21 +++++++++++++++++++++
4 files changed, 76 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index db259ce8b74..f4b9b507375 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,46 @@
+2024-06-28 Kewen Lin <li...@linux.ibm.com>
+
+ Backported from master:
+ 2024-06-21 Kewen Lin <li...@linux.ibm.com>
+ Xionghu Luo <xionghu...@tencent.com>
+
+ PR target/106069
+ PR target/115355
+ * config/rs6000/altivec.md (altivec_vmrghw_direct_<VSX_W:mode>): Rename
+ to ...
+ (altivec_vmrghw_direct_<VSX_W:mode>_be): ... this. Add the condition
+ BYTES_BIG_ENDIAN.
+ (altivec_vmrghw_direct_<VSX_W:mode>_le): New define_insn.
+ (altivec_vmrglw_direct_<VSX_W:mode>): Rename to ...
+ (altivec_vmrglw_direct_<VSX_W:mode>_be): ... this. Add the condition
+ BYTES_BIG_ENDIAN.
+ (altivec_vmrglw_direct_<VSX_W:mode>_le): New define_insn.
+ (altivec_vmrghw): Adjust by calling gen_altivec_vmrghw_direct_v4si_be
+ for BE and gen_altivec_vmrglw_direct_v4si_le for LE.
+ (altivec_vmrglw): Adjust by calling gen_altivec_vmrglw_direct_v4si_be
+ for BE and gen_altivec_vmrghw_direct_v4si_le for LE.
+ (vec_widen_umult_hi_v8hi): Adjust the call to
+ gen_altivec_vmrghw_direct_v4si by gen_altivec_vmrghw for BE
+ and by gen_altivec_vmrglw for LE.
+ (vec_widen_smult_hi_v8hi): Likewise.
+ (vec_widen_umult_lo_v8hi): Adjust the call to
+ gen_altivec_vmrglw_direct_v4si by gen_altivec_vmrglw for BE
+ and by gen_altivec_vmrghw for LE
+ (vec_widen_smult_lo_v8hi): Likewise.
+ * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
+ CODE_FOR_altivec_vmrghw_direct_v4si by
+ CODE_FOR_altivec_vmrghw_direct_v4si_be for BE and
+ CODE_FOR_altivec_vmrghw_direct_v4si_le for LE. And replace
+ CODE_FOR_altivec_vmrglw_direct_v4si by
+ CODE_FOR_altivec_vmrglw_direct_v4si_be for BE and
+ CODE_FOR_altivec_vmrglw_direct_v4si_le for LE.
+ * config/rs6000/vsx.md (vsx_xxmrghw_<VSX_W:mode>): Adjust by calling
+ gen_altivec_vmrghw_direct_v4si_be for BE and
+ gen_altivec_vmrglw_direct_v4si_le for LE.
+ (vsx_xxmrglw_<VSX_W:mode>): Adjust by calling
+ gen_altivec_vmrglw_direct_v4si_be for BE and
+ gen_altivec_vmrghw_direct_v4si_le for LE.
+
2024-06-27 Wilco Dijkstra <wilco.dijks...@arm.com>
Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index b08c5cee3e2..674b36c5c7c 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240628
+20240629
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 71a6a1de8c9..b7d55cf675a 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2024-06-28 Kewen Lin <li...@linux.ibm.com>
+
+ Backported from master:
+ 2024-06-21 Kewen Lin <li...@linux.ibm.com>
+ Xionghu Luo <xionghu...@tencent.com>
+
+ PR target/106069
+ PR target/115355
+ * g++.target/powerpc/pr106069.C: New test.
+ * gcc.target/powerpc/pr115355.c: New test.
+
2024-06-27 Andrew Carlotti <andrew.carlo...@arm.com>
Backported from master:
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 1fdd7f39b59..959d59758ff 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,24 @@
+2024-06-28 Jonathan Wakely <jwak...@redhat.com>
+
+ Backported from master:
+ 2024-06-25 Jonathan Wakely <jwak...@redhat.com>
+
+ * doc/xml/faq.xml: Replace viewcvs links with cgit links.
+ * doc/xml/manual/allocator.xml: Likewise.
+ * doc/xml/manual/mt_allocator.xml: Likewise.
+ * doc/html/*: Regenerate.
+
+2024-06-28 Jonathan Wakely <jwak...@redhat.com>
+
+ Backported from master:
+ 2024-06-27 Jonathan Wakely <jwak...@redhat.com>
+
+ PR libstdc++/115668
+ * include/bits/chrono_io.h (formatter<duration<R,P, C>::format):
+ Do not use chrono::abs.
+ * testsuite/20_util/duration/io.cc: Check formatting a duration
+ with unsigned rep.
+
2024-06-27 Alexandre Oliva <ol...@adacore.com>
Backported from master:
