https://gcc.gnu.org/g:c3be325dd165edbe6b1570f54015b3ea8a43862b
commit r15-1588-gc3be325dd165edbe6b1570f54015b3ea8a43862b
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue Jun 25 00:18:09 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 223 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/fortran/ChangeLog | 9 ++
gcc/testsuite/ChangeLog | 91 ++++++++++++++++++++
4 files changed, 324 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4649a2e5349..1ed77443c65 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,226 @@
+2024-06-24 Sergei Lewis <sle...@rivosinc.com>
+
+ * config/riscv/riscv-protos.h (riscv_vector::expand_vec_setmem): New
+ function declaration.
+ * config/riscv/riscv-string.cc (riscv_vector::expand_vec_setmem): New
+ function: this generates an inline vectorised memory set, if and only if
+ we know the entire operation can be performed in a single vector store.
+ * config/riscv/riscv.md (setmem<mode>): Try
riscv_vector::expand_vec_setmem
+ for constant lengths. Do not require operand 2 to be a constant.
+
+2024-06-24 Patrick O'Neill <patr...@rivosinc.com>
+
+ * doc/sourcebuild.texi (dg-remove-option): Add documentation.
+ (dg-add-option): Add documentation for riscv_{a,zaamo,zalrsc,ztso}
+
+2024-06-24 Roger Sayle <ro...@nextmovesoftware.com>
+ Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/113673
+ * gimple-ssa-store-merging.cc (find_bswap_or_nop_load): Make static.
+ (find_bswap_or_nop_1): Avoid transformations (load merging) when
+ stmt_can_throw_internal indicates that a statement can trap.
+
+2024-06-24 Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/115602
+ * tree-vect-slp.cc (vect_cse_slp_nodes): Delay populating the
+ bst-map to avoid cycles.
+
+2024-06-24 Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/115528
+ * tree-vect-data-refs.cc (vect_compute_data_ref_alignment):
+ Make sure to look at both the inner and outer loop step
+ behavior.
+
+2024-06-24 Pali Rohár <p...@kernel.org>
+
+ * config/i386/mingw-w64.h (CPP_SPEC): Add missing -mcrtdll=
+ cases: msvcr40*, msvcrtd*.
+ * config/mingw/mingw32.h (CPP_SPEC): Add missing -mcrtdll=
+ cases: msvcr40*, msvcrtd*.
+ * doc/invoke.texi: Add missing -mcrtdll= cases: msvcr40*,
+ msvcrtd*, msvcr71*. Express wildcards with *. Document _UCRT.
+
+2024-06-24 Richard Sandiford <richard.sandif...@arm.com>
+
+ * common.opt.urls: Regenerate.
+
+2024-06-24 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR rtl-optimization/106594
+ PR rtl-optimization/114515
+ PR rtl-optimization/114575
+ PR rtl-optimization/114996
+ PR rtl-optimization/115104
+ * Makefile.in (OBJS): Add late-combine.o.
+ * common.opt (flate-combine-instructions): New option.
+ * doc/invoke.texi: Document it.
+ * opts.cc (default_options_table): Enable it by default at -O2
+ and above.
+ * tree-pass.h (make_pass_late_combine): Declare.
+ * late-combine.cc: New file.
+ * passes.def: Add two instances of late_combine.
+ * doc/passes.texi: Document the new passes.
+ * config/i386/i386-options.cc (ix86_override_options_after_change):
+ Disable late-combine by default.
+ * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise.
+ * config/xtensa/xtensa.cc (xtensa_option_override): Likewise.
+
+2024-06-24 Richard Sandiford <richard.sandif...@arm.com>
+
+ * rtl-ssa.h: Include predicates.h.
+ * rtl-ssa/predicates.h: New file.
+ * rtl-ssa/access-utils.h (prev_call_clobbers_ignoring): Rename to...
+ (prev_call_clobbers): ...this and treat the ignore parameter as an
+ object with the same interface as ignore_nothing.
+ (next_call_clobbers_ignoring): Rename to...
+ (next_call_clobbers): ...this and treat the ignore parameter as an
+ object with the same interface as ignore_nothing.
+ (first_nondebug_insn_use_ignoring): Rename to...
+ (first_nondebug_insn_use): ...this and treat the ignore parameter as
+ an object with the same interface as ignore_nothing.
+ (last_nondebug_insn_use_ignoring): Rename to...
+ (last_nondebug_insn_use): ...this and treat the ignore parameter as
+ an object with the same interface as ignore_nothing.
+ (last_access_ignoring): Rename to...
+ (last_access): ...this and treat the ignore parameter as an object
+ with the same interface as ignore_nothing. Conditionally skip
+ definitions.
+ (prev_access_ignoring): Rename to...
+ (prev_access): ...this and treat the ignore parameter as an object
+ with the same interface as ignore_nothing.
+ (first_def_ignoring): Replace with...
+ (first_access): ...this new function.
+ (next_access_ignoring): Rename to...
+ (next_access): ...this and treat the ignore parameter as an object
+ with the same interface as ignore_nothing. Conditionally skip
+ definitions.
+ * rtl-ssa/change-utils.h (insn_is_changing): Delete.
+ (restrict_movement_ignoring): Rename to...
+ (restrict_movement): ...this and treat the ignore parameter as an
+ object with the same interface as ignore_nothing.
+ (recog_ignoring): Rename to...
+ (recog): ...this and treat the ignore parameter as an object with
+ the same interface as ignore_nothing.
+ * rtl-ssa/changes.h (insn_is_changing_closure): Delete.
+ * rtl-ssa/functions.h (function_info::add_regno_clobber): Treat
+ the ignore parameter as an object with the same interface as
+ ignore_nothing.
+ * rtl-ssa/insn-utils.h (insn_is): Delete.
+ * rtl-ssa/insns.h (insn_is_closure): Delete.
+ * rtl-ssa/member-fns.inl
+ (insn_is_changing_closure::insn_is_changing_closure): Delete.
+ (insn_is_changing_closure::operator()): Likewise.
+ (function_info::add_regno_clobber): Treat the ignore parameter
+ as an object with the same interface as ignore_nothing.
+ (ignore_changing_insns::ignore_changing_insns): New function.
+ (ignore_changing_insns::should_ignore_insn): Likewise.
+ * rtl-ssa/movement.h (restrict_movement_for_dead_range): Treat
+ the ignore parameter as an object with the same interface as
+ ignore_nothing.
+ (restrict_movement_for_defs_ignoring): Rename to...
+ (restrict_movement_for_defs): ...this and treat the ignore parameter
+ as an object with the same interface as ignore_nothing.
+ (restrict_movement_for_uses_ignoring): Rename to...
+ (restrict_movement_for_uses): ...this and treat the ignore parameter
+ as an object with the same interface as ignore_nothing. Conditionally
+ skip definitions.
+ * doc/rtl.texi: Update for above name changes. Use
+ ignore_changing_insns instead of insn_is_changing.
+ * config/aarch64/aarch64-cc-fusion.cc (cc_fusion::parallelize_insns):
+ Likewise.
+ * pair-fusion.cc (no_ignore): Delete.
+ (latest_hazard_before, first_hazard_after): Update for above name
+ changes. Use ignore_nothing instead of no_ignore.
+ (pair_fusion_bb_info::fuse_pair): Update for above name changes.
+ Use ignore_changing_insns instead of insn_is_changing.
+ (pair_fusion::try_promote_writeback): Likewise.
+
+2024-06-24 Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/115599
+ * tree-ssa-reassoc.cc (compare_repeat_factors): Use explicit
+ compares to avoid truncations.
+
+2024-06-24 Haochen Gui <guih...@gcc.gnu.org>
+
+ PR target/113325
+ * config/rs6000/vsx.md (vsx_stxvd2x4_le_const_<mode>): New.
+
+2024-06-24 Haochen Gui <guih...@gcc.gnu.org>
+
+ * fwprop.cc (try_fwprop_subst_pattern): Invoke change_is_worthwhile
+ to judge if a replacement is worthwhile. Remove single_set check
+ and add is_debug_insn check.
+ * recog.cc (swap_change): Invalidate recog_data when the cached INSN
+ is swapped out.
+ * rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Check if the
+ insn cost of new rtl is unknown and fail the replacement.
+
+2024-06-24 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (MAX_FIELDLIST_SIZE): Define.
+ (struct codeview_integer): New structure.
+ (struct codeview_subtype): Likewise
+ (struct codeview_custom_type): Add lf_fieldlist and lf_enum to union.
+ (write_cv_integer, cv_integer_len): New functions.
+ (write_lf_fieldlist, write_lf_enum): Likewise.
+ (write_custom_types): Call write_lf_fieldlist and write_lf_enum.
+ (add_enum_forward_def): New function.
+ (get_type_num_enumeration_type): Likewise.
+ (get_type_num): Handle DW_TAG_enumeration_type DIEs.
+ * dwarf2codeview.h (LF_FIELDLIST, LF_INDEX, LF_ENUMERATE): Define.
+ (LF_ENUM, LF_CHAR, LF_SHORT, LF_USHORT, LF_LONG): Likewise.
+ (LF_ULONG, LF_QUADWORD, LF_UQUADWORD): Likewise.
+ (CV_ACCESS_PRIVATE, CV_ACCESS_PROTECTED): Likewise.
+ (CV_ACCESS_PUBLIC, CV_PROP_FWDREF): Likewise.
+
+2024-06-24 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc
+ (struct codeview_custom_type): Add lf_modifier to union.
+ (write_cv_padding, write_lf_modifier): New functions.
+ (write_custom_types): Call write_lf_modifier.
+ (get_type_num_const_type): New function.
+ (get_type_num_volatile_type): Likewise.
+ (get_type_num): Handle DW_TAG_const_type and DW_TAG_volatile_type DIEs.
+ * dwarf2codeview.h (MOD_const, MOD_volatile): Define.
+ (LF_MODIFIER): Likewise.
+
+2024-06-24 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (FIRST_TYPE): Define.
+ (struct codeview_custom_type): New structure.
+ (custom_types, last_custom_type): New variables.
+ (get_type_num): Prototype.
+ (write_lf_pointer, write_custom_types): New functions.
+ (codeview_debug_finish): Call write_custom_types.
+ (add_custom_type, get_type_num_pointer_type): New functions.
+ (get_type_num): Handle DW_TAG_pointer_type DIEs.
+ * dwarf2codeview.h (T_VOID): Define.
+ (CV_POINTER_32, CV_POINTER_64): Likewise.
+ (T_32PVOID, T_64PVOID): Likewise.
+ (CV_PTR_NEAR32, CV_PTR64, LF_POINTER): Likewise.
+
+2024-06-24 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (get_type_num): Handle typedefs.
+
+2024-06-24 Mark Harmstone <m...@harmstone.com>
+
+ * dwarf2codeview.cc (struct codeview_type): New structure.
+ (struct die_hasher): Likewise.
+ (types_htab): New variable.
+ (codeview_debug_finish): Free types_htab if allocated.
+ (get_type_num_base_type, get_type_num): New function.
+ (add_variable): Call get_type_num.
+ * dwarf2codeview.h (T_CHAR, T_SHORT, T_LONG, T_QUAD): Define.
+ (T_UCHAR, T_USHORT, T_ULONG, T_UQUAD, T_BOOL08): Likewise.
+ (T_REAL32, T_REAL64, T_REAL80, T_REAL128, T_RCHAR): Likewise.
+ (T_WCHAR, T_INT4, T_UINT4, T_CHAR16, T_CHAR32, T_CHAR8): Likewise.
+
2024-06-23 Mark Harmstone <m...@harmstone.com>
* dwarf2codeview.cc (S_LDATA32, S_GDATA32): Define.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 149499c5447..271b3eb540d 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20240624
+20240625
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index e07e417939f..f05b1c9a25c 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,12 @@
+2024-06-24 Harald Anlauf <anl...@gmx.de>
+
+ PR fortran/55978
+ * trans-array.cc (gfc_conv_array_parameter): Do not dereference
+ data component of a missing allocatable dummy array argument for
+ passing as actual to optional dummy. Harden logic of presence
+ check for optional pointer dummy by using TRUTH_ANDIF_EXPR instead
+ of TRUTH_AND_EXPR.
+
2024-06-20 Paul Thomas <pa...@gcc.gnu.org>
PR fortran/59104
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 20026021c2b..78b4a3a5204 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,94 @@
+2024-06-24 Sergei Lewis <sle...@rivosinc.com>
+
+ * gcc.target/riscv/rvv/base/setmem-1.c: New tests
+ * gcc.target/riscv/rvv/base/setmem-2.c: New tests
+ * gcc.target/riscv/rvv/base/setmem-3.c: New tests
+
+2024-06-24 Patrick O'Neill <patr...@rivosinc.com>
+
+ * gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c: Add dg-remove-options
+ for ztso.
+ * gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-fence-1.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-fence-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-fence-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-fence-4.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-fence-5.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-load-1.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-load-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-load-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-store-1.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-store-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: Ditto.
+ * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: Ditto.
+ * gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c: Replace manually
+ specified -march string with dg-add/remove-options directives.
+ * gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c: Ditto.
+ * gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c: Ditto.
+ * gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c: Ditto.
+ * gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c: Ditto.
+ * lib/target-supports-dg.exp: Add dg-remove-options.
+ * lib/target-supports.exp: Add dg-remove-options and consolidate z*
+ extension add/remove-option code.
+
+2024-06-24 Harald Anlauf <anl...@gmx.de>
+
+ PR fortran/55978
+ * gfortran.dg/optional_absent_12.f90: New test.
+
+2024-06-24 Roger Sayle <ro...@nextmovesoftware.com>
+ Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/113673
+ * g++.dg/pr113673.C: New test case.
+
+2024-06-24 Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/115602
+ * gcc.dg/vect/pr115602.c: New testcase.
+
+2024-06-24 Richard Biener <rguent...@suse.de>
+
+ PR tree-optimization/115528
+ * gfortran.dg/vect/pr115528.f: New testcase.
+
+2024-06-24 Richard Sandiford <richard.sandif...@arm.com>
+
+ PR rtl-optimization/106594
+ * gcc.dg/ira-shrinkwrap-prep-1.c: Restrict XFAIL to non-aarch64
+ targets.
+ * gcc.dg/ira-shrinkwrap-prep-2.c: Likewise.
+ * gcc.dg/stack-check-4.c: Add -fno-shrink-wrap.
+ * gcc.target/aarch64/bitfield-bitint-abi-align16.c: Add
+ -fno-late-combine-instructions.
+ * gcc.target/aarch64/bitfield-bitint-abi-align8.c: Likewise.
+ * gcc.target/aarch64/sve/cond_asrd_3.c: Remove XFAILs.
+ * gcc.target/aarch64/sve/cond_convert_3.c: Likewise.
+ * gcc.target/aarch64/sve/cond_fabd_5.c: Likewise.
+ * gcc.target/aarch64/sve/cond_convert_6.c: Expect the MOVPRFX /Zs
+ described in the comment.
+ * gcc.target/aarch64/sve/cond_unary_4.c: Likewise.
+ * gcc.target/aarch64/pr106594_1.c: New test.
+
+2024-06-24 Haochen Gui <guih...@gcc.gnu.org>
+
+ PR target/113325
+ * gcc.target/powerpc/pr113325.c: New.
+
2024-06-23 Artemiy Volkov <artemiy.vol...@synopsys.com>
* gcc.target/riscv/zicond-ice-5.c: New test.
