Hi, > -----Original Message----- > From: Ilya Enkovich [mailto:enkovich....@gmail.com] > Sent: Wednesday, April 27, 2016 5:35 PM > To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > Cc: vmaka...@redhat.com; gcc@gcc.gnu.org; Uros Bizjak > (ubiz...@gmail.com) <ubiz...@gmail.com> > Subject: Re: Question on TARGET_MMX and > X86_TUNE_GENERAL_REGS_SSE_SPILL > > 2016-04-27 14:35 GMT+03:00 Kumar, Venkataramanan > <venkataramanan.ku...@amd.com>: > > Hi , > > > >> -----Original Message----- > >> From: Ilya Enkovich [mailto:enkovich....@gmail.com] > >> Sent: Tuesday, April 26, 2016 7:09 PM > >> To: Kumar, Venkataramanan <venkataramanan.ku...@amd.com> > >> Cc: vmaka...@redhat.com; gcc@gcc.gnu.org; Uros Bizjak > >> (ubiz...@gmail.com) <ubiz...@gmail.com> > >> Subject: Re: Question on TARGET_MMX and > >> X86_TUNE_GENERAL_REGS_SSE_SPILL > >> > >> 2016-04-14 8:39 GMT+03:00 Kumar, Venkataramanan > >> <venkataramanan.ku...@amd.com>: > >> > Hi, > >> > > >> > X86_TUNE_GENERAL_REGS_SSE_SPILL: Try to spill general regs to SSE > >> > regs > >> instead of memory. > >> > > >> > I tried enabling the above tuning with -march=bdver4 -Ofast -mtune- > >> ctrl=general_regs_sse_spill. > >> > I did not find any code differences. > >> > > >> > Looking at the below code to enable this tune, mmx ISA needs to be > >> > turned > >> off. > >> > > >> > static reg_class_t > >> > ix86_spill_class (reg_class_t rclass, machine_mode mode) { > >> > if (TARGET_SSE && TARGET_GENERAL_REGS_SSE_SPILL && ! > >> TARGET_MMX > >> > && (mode == SImode || (TARGET_64BIT && mode == DImode)) > >> > && rclass != NO_REGS && INTEGER_CLASS_P (rclass)) > >> > return ALL_SSE_REGS; > >> > return NO_REGS; > >> > } > >> > > >> > All processor variants enable MMX by default and why we need to > >> > switch > >> off mmx? > >> > >> That really looks weird to me. I ran SPEC2006 on Ofast + LTO with > >> and without -mno-mmx and -mno-mmx gives (Haswell machine): > >> > >> SPEC2006INT : +0.30% > >> SPEC2006FP : +0.60% > >> SPEC2006ALL : +0.48% > >> > >> Which is quite surprising for disabling a hardware feature hardly > >> used anywhere now. > > > > As I said without mmx (-mno-mmx), the tune > X86_TUNE_GENERAL_REGS_SSE_SPILL may be active now. > > Not sure if there are any other reason. > > Surely that should be the main reason I see performance gain. > So I want to ask the same question as you did: why does this important > performance feature requires disabled MMX. This restriction exists from the > very start of X86_TUNE_GENERAL_REGS_SSE_SPILL existence (at least in > trunk) and no comments on why we have this restriction.
I was told by Uros, that using TARGET_MMX is to prevent intreg <-> MMX moves that clobber stack registers. > > Did you try to remove !TARGET_MMX and see what happens? > Yes, I tried on SPEC2006 but did not find any benefit. > Thanks, > Ilya > > > > >> > >> > >> Thanks, > >> Ilya > >> > >> > > >> > Thanks and regards, > >> > Venkat. > > Regards, Venkat.