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[Apologies if I'm talking rubbish, or spamming folk with the obvious]
Such an optimisation would ideally be dependent on some estimate on
the register pressure for the relevant register class[es], and perhaps
on some heuristic estimate of the relative execution frequency.
As a standalone function on many RISC machines, register allocation
for foo() is free. But if we inline foo() into a larger function,
register pressure and code fetch time become more important, perhaps
depending on whether the code is executed at most once per invocation,
or known to be executed a million times per invocation.
John.
On 02/12/14 10:23, Richard Biener wrote:
> On Tue, Dec 2, 2014 at 12:11 AM, shmeel gutl
> <shmeelg...@shmuelhome.mine.nu> wrote:
>> While testing my implementation of passing arguments in
>> registers, I noticed that gcc 4.7 creates instruction
>> dependencies when it doesn't have to. Consider:
>>
>> int foo(int a1, int a2, int a3, int a4) { return a1|a2|a3|a4; }
>>
>> gcc, even with -O2 generated code that was equivalent to
>>
>> temp1 = a1 | a2; temp2 = temp1 | a3; temp3 = temp2 | a4;
>>
>> return temp3;
>>
>> This code must be executed serially.
>>
>> Could I create patterns, or enable optimizations that would cause
>> the compiler to generate
>>
>> temp1 = a1 | a2; temp2 = a3 | a4; temp3 = temp1 | temp2;
>>
>> Thereby allowing the scheduler to compute temp1 and temp2 in
>> parallel.
>
> You can tune it with --param tree-reassoc-width=N, not sure if
> that was implemented for 4.7 already.
>
> Richard.
>
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