On Fri, Feb 28, 2014 at 10:23 AM, Eric Botcazou <ebotca...@adacore.com> wrote: >> Of course if the GIMPLE level doesn't care about the barrier then it doesn't >> make sense to be overly conservative at the RTL CSE level. Thus I think we >> can just remove this barrier completely. > > Not clear to me, what happens e.g. for register variables?
Not sure, on GIMPLE some passes explicitely avoid doing some transforms for DECL_HARD_REGISTER variables, some don't. A volatile asm is certainly not considered a barrier here (DECL_HARD_REGISTER vars are not written into SSA form but they are not having their address taken and thus the volatile asm memory clobber isn't a barrier for them). Richard.
