Sorry for the late answer.
Umesh Kalappa <umesh.kalap...@gmail.com> writes:
> Was porting gcc 4.8.1 to the private target which has 8 bit regs and
> can be used as pair for 16bit like AB ,CD but not BC or AD.
>
> I was stuck in the type promotion like
>
> int i;
> unsigned char c;
>
> int test ()
> {
> i =c;
> }
>
> defined the zero_extendqihi2 pattern for the above c construct like
>
> (define_expand zero_extendqihi2
> [(set (operand:hi 0 "" """)
> (zero_extend:hi (operand:qi 1)))]
> ""
> if(!reload_completed)
> {
> if(operands[1] != REG)
> operands[1]= force_reg(QI,operands[1]);
>
> /* Here i need to enforce gcc to use the next consective paired reg
> like B if operands[1] is in A reg or D if operands[1] is in C */
> }
> )
>
> How do i module the above reguirement in the backend ?
You might have already solved this by now, but this kind of restriction
is usually modelled via HARD_REGNO_MODE_OK. A and C would be “OK”
for HImode but B and D wouldn't.
Did you single out zero_extend because the QImode input also needs
to follow the same rules? If so, the way to model that depends on
the restriction. If the QImode input to the zero_extend must be in
the low 8 bits of the output register then you can use matching
constraints like "0" for the input operand. (It's OK to match
operands of different sizes like this.) If instead the QImode
input is independent of the HImode output but can only go in
certain registers (perhaps just A or C, for example) then you
can define a register class that just includes those registers.
You'd then need an associated define_register_constraint.
Thanks,
Richard
