On 18/07/11 17:53, Richard Henderson wrote:
Otherwise, have a look at the mn10300 and rx ports.
What's the idea behind the rx port *_flags alternative define_insn?
For example:
(define_insn "abssi2"
[(set (match_operand:SI 0 "register_operand" "=r,r")
(abs:SI (match_operand:SI 1 "register_operand" "0,r")))
(clobber (reg:CC CC_REG))]
""
"@
abs\t%0
abs\t%1, %0"
[(set_attr "length" "2,3")]
)
(define_insn "*abssi2_flags"
[(set (match_operand:SI 0 "register_operand" "=r,r")
(abs:SI (match_operand:SI 1 "register_operand" "0,r")))
(set (reg CC_REG)
(compare (abs:SI (match_dup 1))
(const_int 0)))]
;; Note - although the ABS instruction does set the O bit in the
processor
;; status word, it does not do so in a way that is comparable with
the CMP
;; instruction. Hence we use CC_ZSmode rather than CC_ZSOmode.
"reload_completed && rx_match_ccmode (insn, CC_ZSmode)"
"@
abs\t%0
abs\t%1, %0"
[(set_attr "length" "2,3")]
)
What's the point of the second define insn? The first insn seems to take
us from expansion to asm generation so I can't see where the second one
will come into play except in an expansion after reload but that doesn't
happen, right?
--
PMatos
