Hi, My port hits this assertion in loop-iv.c:799:
gcc_assert ((*inner_mode == *outer_mode) != (*extend != UNKNOWN)); It's in the function get_biv_step: static bool get_biv_step (df_ref last_def, rtx reg, rtx *inner_step, enum machine_mode *inner_mode, enum rtx_code *extend, enum machine_mode *outer_mode, rtx *outer_step) { *outer_mode = GET_MODE (reg); if (!get_biv_step_1 (last_def, reg, inner_step, inner_mode, extend, *outer_mode, outer_step)) return false; gcc_assert ((*inner_mode == *outer_mode) != (*extend != UNKNOWN)); gcc_assert (*inner_mode != *outer_mode || *outer_step == const0_rtx); return true; } The analyzed register is SImode (outer_mode), but the step determined by the biv step analysis returns a V2HI (inner_mode) step value. As the register is modified through a subreg, there's no extension. The vector mode comes from the analysis of the following insn: (insn 170 169 171 12 /work1-disk/dft/src/dft.c:99 (set (subreg:V2HI (reg:SI 544 [ vect_vec_iv_.173 ]) 0) (plus:V2HI (subreg:V2HI (reg:SI 540 [ vect_vec_iv_.173 ]) 0) (subreg:V2HI (reg:SI 542 [ vect_cst_.172 ]) 0))) 347 {addv2hi3} (expr_list:REG_DEAD (reg:SI 542 [ vect_cst_.172 ]) (expr_list:REG_EQUAL (plus:V2HI (subreg:V2HI (reg:SI 540 [ vect_vec_iv_.173 ]) 0) (const_vector:V2HI [ (const_int 4 [0x4]) (const_int 4 [0x4]) ])) (nil)))) The code looks OK to me, but I thought there might be some rule about vector subregs that I don't know about. If the code is OK, should get_biv_step return true or false? Many thanks, Fred