roy rosen <roy.1ro...@gmail.com> writes:
> In my port I get to such a situation:
>
> (insn 60 59 61 4 a.c:65 (set (subreg:SI (reg:HI 129 [ __prephitmp_4 ]) 0)
> (zero_extract:SI (subreg:SI (reg/v:DI 138 [ v4hi1 ]) 4)
> (const_int 16 [0x10])
> (const_int 16 [0x10]))) 53 {extzv} (nil))
>
> (insn 61 60 62 4 a.c:65 (set (reg:BI 159)
> (gtu:BI (reg:HI 129 [ __prephitmp_4 ])
> (reg/v:HI 143 [ usiThresh ]))) 94 {cmprr_hi_gtu} (nil))
>
> The patterns for these are:
>
> (define_insn "extzv"
> [(set (match_operand:SI 0 "register_operand" "=d")
> (zero_extract:SI (match_operand:SI 1 "register_operand" "d")
> (match_operand:SI 2 "immediate_operand" "U06")
> (match_operand:SI 3 "immediate_operand" "U06")))]
> ""
> "extractua\t %2, %3, %1, %0 %!"
> )
>
> and
>
> (define_insn "cmprr_hi_<code>"
> [(set (match_operand:BI 0 "register_operand" "=c")
> (any_cond_rr:BI (match_operand:HI 1 "register_operand" "d")
> (match_operand:HI 2 "register_operand" "d")))]
> ""
> "cmp<code> %2.L, %1.L, %0:%I0 %!"
> )
>
> I want the combiner to combine both insns since I have an intruction
> which can compare from an HI partial register.
> I am trying to write an insn pattern for that but the combiner does not use i.
> I thought about something like:
>
> (define_insn "cmprr_hi_<code>_1"
> [(set (match_operand:BI 0 "register_operand" "=c")
> (any_cond_rr:BI (zero_extract:SI (match_operand:DI 1
> "register_operand" "d")
> (const_int 16) (const_int 16))
> (match_operand:HI 2 "register_operand" "d")))]
> ""
> "cmp<code> %2.L, %1.L, %0:%I0 %!"
> )
>
> but it does not work.
That insn won't work because you don't have a DImode operand to your
zero_extract. You have an SImode operand. It's a subeg of a DImode
operand, but that doesn't matter.
I'm not sure how well combine will work with the paradoxical subreg
(subreg:SI (reg:HI 129 [ __prephitmp_4 ]) 0) though.
Ian
