2010/1/16 fanqifei <fanqi...@gmail.com>:
> 2010/1/15 Ian Lance Taylor <i...@google.com>:
>> There are many places where that insn could be generated, so it's
>> pretty hard to answer your question as asked.
>>
>> I recommend setting a breakpoint on make_insn_raw if
>> cfun->emit->x_cur_insn_uid == 479. Then a backtrace will show you
>> what is creating the insn.
>>
>> Ian
>>
> That insn was generated in subst_reloads() called by reload_as_needed
> in reload1.c.
>
> In greg pass, the instruction#320 needs to be splitted. The cpu
> supports the memory address mode mem(r1*4+r2).
> (insn 320 308 309 19 a.c:381 (set (reg:SI 207 [ <variable>.wrData ])
> (mem/s:SI (plus:SI (mult:SI (reg:SI 204)
> (const_int 4 [0x4]))
> (reg/f:SI 234)) [5 <variable>.wrData+0 S4 A32])) 3
> {movsi} (expr_list:REG_DEAD (reg:SI 204)
> (nil)))
>
> In find_reloads() (called by reload_as_needed()), following reload
> information was generated.
> (insn 320 308 309 19 a.c:381 (set (reg:SI 14 a14 [orig:207
> <variable>.wrData ] [207])
> (mem/s:SI (plus:SI (mult:SI (reg:SI 9 a9 [204])
> (const_int 4 [0x4]))
> (plus:SI (reg/f:SI 16 SP)
> (const_int 96 [0x60]))) [5 <variable>.wrData+0 S4
> A32])) 3 {movsi} (expr_list:REG_DEAD (reg:SI 9 a9 [204])
> (nil)))
> Reload 0: reload_in (SI) = (plus:SI (reg/f:SI 16 SP)
> (const_int 96 [0x60]))
> GENERAL_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 1)
> reload_in_reg: (plus:SI (reg/f:SI 16 SP)
> (const_int 96 [0x60]))
> reload_reg_rtx: (reg:SI 12 a12)
> Reload 1: reload_in (SI) = (plus:SI (mult:SI (reg:SI 9 a9 [204])
> (const_int 4 [0x4]))
> (plus:SI (reg/f:SI 16 SP)
> (const_int 96 [0x60])))
> GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1), inc by 4
> reload_in_reg: (plus:SI (mult:SI (reg:SI 9 a9 [204])
> (const_int 4 [0x4]))
> (plus:SI (reg/f:SI 16 SP)
> (const_int 96 [0x60])))
> reload_reg_rtx: (reg:SI 12 a12)
>
> After find_reloads() called, emit_reload_insns() generated insns to
> reload operands. Then subst_reloads() substituted the reload regs
> using the replacement information.
>
> The insn list after subst_reloads():
> (insn 475 308 477 19 a.c:381 (set (reg:SI 12 a12)
> (const_int 96 [0x60])) -1 (nil))
>
> (insn 477 475 478 19 a.c:381 (set (reg:SI 12 a12)
> (reg/f:SI 16 SP)) -1 (nil))
>
> (insn 478 477 479 19 a.c:381 (set (reg:SI 12 a12)
> (plus:SI (reg:SI 12 a12)
> (const_int 96 [0x60]))) -1 (expr_list:REG_EQUIV (plus:SI
> (reg/f:SI 16 SP)
> (const_int 96 [0x60]))
> (nil)))
>
> (insn 479 478 320 19 a.c:381 (set (reg:SI 12 a12)
> (plus:SI (mult:SI (reg:SI 9 a9 [204])
> (const_int 4 [0x4]))
> (reg:SI 12 a12))) -1 (nil))
>
> (insn 320 479 481 19 a.c:381 (set (reg:SI 14 a14 [orig:207
> <variable>.wrData ] [207])
> (mem/s:SI (reg:SI 12 a12) [5 <variable>.wrData+0 S4 A32])) 3
> {movsi} (expr_list:REG_DEAD (reg:SI 9 a9 [204])
> (nil)))
>
> But insn#479 is not recognized by recog() in insn-recog.c and the
> compilation failed. (recog only recognizes RTL defined in md, right?)
> Here the backtrace is
> reload--->cleanup_subreg_operands--->extract_insn_cached--->extract_insn--->recog_memoized--->recog.
> There is no machine instruction(r3=r1*4+r2) match the pattern of
> insn#479. Though there is pattern r3=mem(r1*4+r2).
> I don’t quite understand the generation of reload information.
> What can I do next?
> Thanks!
>
> Qifei Fan
>
Actually the second reload is not needed if there is already the first reload.
If (plus:SI (reg/f:SI 16 SP) (const_int 96 [0x60]) is replaced by
(reg:SI 12 a12), then (plus:SI (mult:SI (reg:SI 9 a9 [204])
(const_int 4 [0x4])) (reg:SI 12 a12) ) is a valid memory address.
But in function find_reloads, I can’t find the related code that
deciding whether the second reload should be generated by regarding
the previous reload. The function is too complex. :-(
Qifei Fan
