On Fri, Nov 17, 2006 at 04:30:53PM -0700, Shaun Jackman wrote:
> The following macro expands to some rather frightful code on the AVR:
>
> #define BSWAP_16(x) \
> ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8))
[snip]
>
> Ideally, this macro would expand to three mov instructions and a ret.
> Is there anything I can do to help GCC along here? I'm using GCC 4.1.0
> with -O2.
Sure. Add a HImode rotate left by eight instruction to the AVR backend.
For example (untested, and I know very little about the AVR):
(define_insn_and_split "*rotlhi3_const8"
[(set (match_operand:HI 0 "register_operand" "=r")
(rotate:HI (match_operand:HI 1 "register_operand" "0")
(const_int 8)))]
"reload_completed"
[(set (match_dup 2) (xor:QI (match_dup 2) (match_dup 3)))
(set (match_dup 3) (xor:QI (match_dup 3) (match_dup 2)))
(set (match_dup 2) (xor:QI (match_dup 2) (match_dup 3)))]
{
operands[2] = simplify_gen_subreg (QImode, operands[0], HImode, 0);
operands[3] = simplify_gen_subreg (QImode, operands[0], HImode, 1);
}
If that isn't enough, try adding an expander also:
(define_expand "rotlhi3"
[(set (match_operand:HI 0 "register_operand")
(rotate:HI (match_operand:HI 1 "register_operand")
(match_operand:HI 2 "const_int_operand")))]
""
{
if (INTVAL (operands[2]) != 8)
FAIL;
})
--
Rask Ingemann Lambertsen
