On Thu, Oct 31, 2024 at 3:55 AM Anton Blanchard via Gcc <gcc@gcc.gnu.org> wrote: > > Hi, > > I think gcc is relying on undefined behaviour with the vcompress instruction. > Unfortunately my test case isn't reproducing on mainline, but gcc looks to > use the fields between the last mask selected field and vl while setting > tail agnostic. > > This thread explains how vcompress is different in that the tail starts after > the last mask selected field: > > https://github.com/riscvarchive/riscv-v-spec/issues/796 > > There was a bug in QEMU that I just fixed that prevented the all 1s tail > agnostic option (rvv_ta_all_1s) from poisoning these bits: > > https://lists.nongnu.org/archive/html/qemu-riscv/2024-10/msg00561.html > > With that fix, I see problems until I modify the previous setvli from ta to > tu. I think 9aabf81f40f0 ("RISC-V: Optimize permutation codegen with > compress") is one place we need to set tail undisturbed, but my fail is > from an earlier checkout so there must be another issue in the tree. > > I presume the fix is to force all these vcompress cases to set tail > undisturbed.
Or to zero, matching the masked behavior? Please file a bugreport so this issue doesn't get lost. Richard. > Thanks, > Anton
