Hi all,
This is a simple patch to add another two ACLE 2.0 predefined macros
into aarch64 backend.
They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently,
those two values are hard-wired to 16.
The following clauses from ACLE 2.0 documentation indicate the meaning
of those two macros:
The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a
power of 2) the maximum available stack alignment.
The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of
2) the maximum available alignment of static data.
aarch64-none-elf target is tested on on the model. No new regression.
Is it Okay for trunk?
Regards,
Renlin Li
gcc/ChangeLog
2014-12-16 Renlin Li <renlin...@arm.com>
* config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Define
__ARM_ALIGN_MAX_PWR
and __ARM_ALIGN_MAX_STACK_PWR.
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 8ed1f84..78417d7 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -29,6 +29,10 @@
builtin_define ("__aarch64__"); \
builtin_define ("__ARM_64BIT_STATE"); \
builtin_define_with_int_value \
+ ("__ARM_ALIGN_MAX_PWR", 16); \
+ builtin_define_with_int_value \
+ ("__ARM_ALIGN_MAX_STACK_PWR", 16); \
+ builtin_define_with_int_value \
("__ARM_ARCH", aarch64_architecture_version); \
cpp_define_formatted \
(parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version); \