Hello, This change mantions AVX-512* new instructions support in GCC: news section of index.html and gcc-5/changes.html.
Index: htdocs/index.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/index.html,v retrieving revision 1.942 diff -p -r1.942 index.html *** htdocs/index.html 17 Nov 2014 08:59:33 -0000 1.942 --- htdocs/index.html 12 Dec 2014 11:39:56 -0000 *************** mission statement</a>.</p> *** 52,57 **** --- 52,83 ---- <dl class="news"> + <dt><span>Intel Skylake Server AVX-512 extensions support</span> + <span class="date">[2014-12-12]</span></dt> + <dd>New ISA extensions support + <a href="https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf";> + AVX-512{BW,DQ,VL,IFMA,VBMI}</a> was added to GCC. That includes inline + assembly support, new intrinsics, and basic autovectorization. + Code was contributed by Sergey Guriev, Alexander Ivchenko, + Maxim Kuznetsov, Sergey Lega, Anna Tikhonova, Ilya Tocar, + Andrey Turetskiy, Ilya Verbin, Kirill Yukhin and + Michael Zolotukhin of Intel, Corp.</dd></dt> Index: htdocs/gcc-5/changes.html =================================================================== RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-5/changes.html,v retrieving revision 1.50 diff -p -r1.50 changes.html *** htdocs/gcc-5/changes.html 10 Dec 2014 00:28:18 -0000 1.50 --- htdocs/gcc-5/changes.html 12 Dec 2014 11:39:56 -0000 *************** constexpr int i = f(42); // i is 42</pre *** 426,431 **** --- 431,449 ---- <h3 id="x86">IA-32/x86-64</h3> <ul> + <li>New ISA extensions support + <a href="https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf";> + AVX-512{BW,DQ,VL,IFMA,VBMI}</a> of Intel's CPU + codenamed Skylake Server was added to GCC. That includes inline + assembly support, new intrinsics, and basic autovectorization. These + new AVX-512 extensions are available via + the following GCC switches: AVX-512 Vector Length EVEX feature: + <code>-mavx512vl</code>, AVX-512 Byte and Word instructions: + <code>-mavx512bw</code>, AVX-512 Dword and Qword instructions: + <code>-mavx512dq</code>, AVX-512 FMA-52 instructions: + <code>-mavx512ifma</code> and for AVX-512 Vector Bit Manipulation + Instructions: <code>-mavx512vbmi</code>. + </li> <li>The new <code>-mrecord-mcount</code> option for <code>-pg</code> generates a Linux kernel style table of pointers to mcount or __fentry__ calls at the beginning of functions. The new Is it ok to install? -- Thanks, K
