From: Charles Baylis <charles.bay...@linaro.org>
gcc/ChangeLog
<DATE> Charles Baylis <charles.bay...@linaro.org>
* config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Add explicit lane
bounds check.
(__LD3_LANE_FUNC): Likewise.
(__LD4_LANE_FUNC): Likewise
gcc/testsuite/ChangeLog:
<DATE> Charles Baylis <charles.bay...@linaro.org>
* gcc.target/aarch64/simd/vld4_lane.c: New test.
Change-Id: Ia95fbed34b50cf710ea9032ff3428a5f1432e0aa
---
gcc/config/aarch64/arm_neon.h | 6 ++++++
gcc/testsuite/gcc.target/aarch64/simd/vld4_lane.c | 15 +++++++++++++++
2 files changed, 21 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/vld4_lane.c
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 8cff719..22df564 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -17901,6 +17901,8 @@ vld2_lane_##funcsuffix (const ptrtype * __ptr, intype
__b, const int __c) \
__o = __builtin_aarch64_set_qregoi##mode (__o, \
(signedtype) __temp.val[1], \
1); \
+ __builtin_aarch64_im_lane_boundsi (__c, \
+ sizeof (vectype) / sizeof (*__ptr)); \
__o = __builtin_aarch64_ld2_lane##mode (
\
(__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c); \
__b.val[0] = (vectype) __builtin_aarch64_get_dregoidi (__o, 0); \
@@ -17991,6 +17993,8 @@ vld3_lane_##funcsuffix (const ptrtype * __ptr, intype
__b, const int __c) \
__o = __builtin_aarch64_set_qregci##mode (__o, \
(signedtype) __temp.val[2], \
2); \
+ __builtin_aarch64_im_lane_boundsi (__c, \
+ sizeof (vectype) / sizeof (*__ptr)); \
__o = __builtin_aarch64_ld3_lane##mode (
\
(__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c); \
__b.val[0] = (vectype) __builtin_aarch64_get_dregcidi (__o, 0); \
@@ -18089,6 +18093,8 @@ vld4_lane_##funcsuffix (const ptrtype * __ptr, intype
__b, const int __c) \
__o = __builtin_aarch64_set_qregxi##mode (__o, \
(signedtype) __temp.val[3], \
3); \
+ __builtin_aarch64_im_lane_boundsi (__c, \
+ sizeof (vectype) / sizeof (*__ptr)); \
__o = __builtin_aarch64_ld4_lane##mode (
\
(__builtin_aarch64_simd_##ptrmode *) __ptr, __o, __c); \
__b.val[0] = (vectype) __builtin_aarch64_get_dregxidi (__o, 0); \
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane.c
b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane.c
new file mode 100644
index 0000000..d14e6c1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vld4_lane.c
@@ -0,0 +1,15 @@
+/* Test error message when passing an invalid value as a lane index. */
+
+/* { dg-do compile } */
+
+#include <arm_neon.h>
+
+int8x8x4_t
+f_vld4_lane (int8_t * p, int8x8x4_t v)
+{
+ int8x8x4_t res;
+ /* { dg-error "lane 8 out of range 0 - 7" "" { target *-*-* } 0 } */
+ res = vld4_lane_s8 (p, v, 8);
+ return res;
+}
+
--
1.9.1
