PING? Is it OK for me to apply this patch? Thanks.
>
> > On 11/12/2014 11:01 AM, Yangfei (Felix) wrote:
> > > +(define_expand "doloop_end"
> > >> + [(use (match_operand 0 "" "")) ; loop pseudo
> > >> + (use (match_operand 1 "" ""))] ; label
> > >> + ""
> > >> + "
> > >> +{
> >
> > Drop the "" surrounding the { }.
> >
> >
> > r~
>
>
> Hello,
> I updated the patch with the redundant "" removed. Is it OK for trunk
> now?
> I hope this patch can catch up with stage 1 of GCC-5.0. Thanks.
>
>
> Index: gcc/ChangeLog
> =============================================================
> ======
> --- gcc/ChangeLog (revision 217394)
> +++ gcc/ChangeLog (working copy)
> @@ -1,3 +1,7 @@
> +2014-11-13 Felix Yang <felix.y...@huawei.com>
> +
> + * config/aarch64/aarch64.md (doloop_end): New pattern.
> +
> 2014-11-11 Andrew Pinski <apin...@cavium.com>
>
> Bug target/61997
> Index: gcc/config/aarch64/aarch64.md
> =============================================================
> ======
> --- gcc/config/aarch64/aarch64.md (revision 217394)
> +++ gcc/config/aarch64/aarch64.md (working copy)
> @@ -4087,6 +4087,47 @@
> [(set_attr "type" "mrs")])
>
>
> +;; Define the subtract-one-and-jump insns so loop.c ;; knows what to
> +generate.
> +(define_expand "doloop_end"
> + [(use (match_operand 0 "" "")) ; loop pseudo
> + (use (match_operand 1 "" ""))] ; label
> + ""
> +{
> + /* Currently SMS relies on the do-loop pattern to recognize loops
> + where (1) the control part consists of all insns defining and/or
> + using a certain 'count' register and (2) the loop count can be
> + adjusted by modifying this register prior to the loop.
> + ??? The possible introduction of a new block to initialize the
> + new IV can potentially affect branch optimizations. */
> + if (optimize > 0 && flag_modulo_sched)
> + {
> + rtx s0;
> + rtx bcomp;
> + rtx loc_ref;
> + rtx cc_reg;
> + rtx insn;
> + rtx cmp;
> +
> + if (GET_MODE (operands[0]) != DImode)
> + FAIL;
> +
> + s0 = operands [0];
> + insn = emit_insn (gen_adddi3_compare0 (s0, s0, GEN_INT (-1)));
> +
> + cmp = XVECEXP (PATTERN (insn), 0, 0);
> + cc_reg = SET_DEST (cmp);
> + bcomp = gen_rtx_NE (VOIDmode, cc_reg, const0_rtx);
> + loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands [1]);
> + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
> + gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp,
> + loc_ref, pc_rtx)));
> + DONE;
> + }
> + else
> + FAIL;
> +})
> +
> ;; AdvSIMD Stuff
> (include "aarch64-simd.md")
