Hello,
This patch introduces rest of intrinsics (compare).
Bootstrapped.
AVX-512* tests on top of patch-set all pass
under simulator.
Is it ok for trunk?
gcc/
* config/i386/avx512bwintrin.h: Add new intrinsics.
* config/i386/avx512vlbwintrin.h: Ditto.
* config/i386/avx512vlintrin.h: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c: New.
* testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c: Ditto.
* testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c: Ditto.
* testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c: Ditto.
--
Thanks, K
diff --git a/gcc/config/i386/avx512bwintrin.h b/gcc/config/i386/avx512bwintrin.h
index 283ead7..fe20129 100644
--- a/gcc/config/i386/avx512bwintrin.h
+++ b/gcc/config/i386/avx512bwintrin.h
@@ -1375,6 +1375,15 @@ _mm512_maskz_unpacklo_epi16 (__mmask32 __U, __m512i __A,
__m512i __B)
extern __inline __mmask64
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpeq_epu8_mask (__m512i __A, __m512i __B)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A,
+ (__v64qi) __B, 0,
+ (__mmask64) -1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_cmpeq_epi8_mask (__m512i __A, __m512i __B)
{
return (__mmask64) __builtin_ia32_pcmpeqb512_mask ((__v64qi) __A,
@@ -1384,6 +1393,15 @@ _mm512_cmpeq_epi8_mask (__m512i __A, __m512i __B)
extern __inline __mmask64
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpeq_epu8_mask (__mmask64 __U, __m512i __A, __m512i __B)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A,
+ (__v64qi) __B, 0,
+ __U);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_cmpeq_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B)
{
return (__mmask64) __builtin_ia32_pcmpeqb512_mask ((__v64qi) __A,
@@ -1393,6 +1411,15 @@ _mm512_mask_cmpeq_epi8_mask (__mmask64 __U, __m512i __A,
__m512i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpeq_epu16_mask (__m512i __A, __m512i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A,
+ (__v32hi) __B, 0,
+ (__mmask32) -1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_cmpeq_epi16_mask (__m512i __A, __m512i __B)
{
return (__mmask32) __builtin_ia32_pcmpeqw512_mask ((__v32hi) __A,
@@ -1402,6 +1429,15 @@ _mm512_cmpeq_epi16_mask (__m512i __A, __m512i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpeq_epu16_mask (__mmask32 __U, __m512i __A, __m512i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A,
+ (__v32hi) __B, 0,
+ __U);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_cmpeq_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)
{
return (__mmask32) __builtin_ia32_pcmpeqw512_mask ((__v32hi) __A,
@@ -1411,6 +1447,15 @@ _mm512_mask_cmpeq_epi16_mask (__mmask32 __U, __m512i
__A, __m512i __B)
extern __inline __mmask64
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpgt_epu8_mask (__m512i __A, __m512i __B)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A,
+ (__v64qi) __B, 6,
+ (__mmask64) -1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_cmpgt_epi8_mask (__m512i __A, __m512i __B)
{
return (__mmask64) __builtin_ia32_pcmpgtb512_mask ((__v64qi) __A,
@@ -1420,6 +1465,15 @@ _mm512_cmpgt_epi8_mask (__m512i __A, __m512i __B)
extern __inline __mmask64
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpgt_epu8_mask (__mmask64 __U, __m512i __A, __m512i __B)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __A,
+ (__v64qi) __B, 6,
+ __U);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_cmpgt_epi8_mask (__mmask64 __U, __m512i __A, __m512i __B)
{
return (__mmask64) __builtin_ia32_pcmpgtb512_mask ((__v64qi) __A,
@@ -1429,6 +1483,15 @@ _mm512_mask_cmpgt_epi8_mask (__mmask64 __U, __m512i __A,
__m512i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpgt_epu16_mask (__m512i __A, __m512i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A,
+ (__v32hi) __B, 6,
+ (__mmask32) -1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_cmpgt_epi16_mask (__m512i __A, __m512i __B)
{
return (__mmask32) __builtin_ia32_pcmpgtw512_mask ((__v32hi) __A,
@@ -1438,6 +1501,15 @@ _mm512_cmpgt_epi16_mask (__m512i __A, __m512i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpgt_epu16_mask (__mmask32 __U, __m512i __A, __m512i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __A,
+ (__v32hi) __B, 6,
+ __U);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_cmpgt_epi16_mask (__mmask32 __U, __m512i __A, __m512i __B)
{
return (__mmask32) __builtin_ia32_pcmpgtw512_mask ((__v32hi) __A,
@@ -2083,6 +2155,294 @@ _mm512_maskz_abs_epi16 (__mmask32 __U, __m512i __A)
(__mmask32) __U);
}
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpneq_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 4,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmplt_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 1,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpge_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 5,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmple_epu8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 2,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpneq_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 4,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmplt_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 1,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpge_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 5,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmple_epu16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 2,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpneq_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 4,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmplt_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 1,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpge_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 5,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmple_epi8_mask (__mmask64 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 2,
+ (__mmask64) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpneq_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 4,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmplt_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 1,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmpge_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 5,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cmple_epi16_mask (__mmask32 __M, __m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 2,
+ (__mmask32) __M);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpneq_epu8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 4,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmplt_epu8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 1,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpge_epu8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 5,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmple_epu8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_ucmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 2,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpneq_epu16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 4,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmplt_epu16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 1,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpge_epu16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 5,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmple_epu16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_ucmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 2,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpneq_epi8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 4,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmplt_epi8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 1,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpge_epi8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 5,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask64
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmple_epi8_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask64) __builtin_ia32_cmpb512_mask ((__v64qi) __X,
+ (__v64qi) __Y, 2,
+ (__mmask64) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpneq_epi16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 4,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmplt_epi16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 1,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmpge_epi16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 5,
+ (__mmask32) - 1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cmple_epi16_mask (__m512i __X, __m512i __Y)
+{
+ return (__mmask32) __builtin_ia32_cmpw512_mask ((__v32hi) __X,
+ (__v32hi) __Y, 2,
+ (__mmask32) - 1);
+}
+
#ifdef __OPTIMIZE__
extern __inline __m512i
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
diff --git a/gcc/config/i386/avx512vlbwintrin.h
b/gcc/config/i386/avx512vlbwintrin.h
index 1a4fe2c..a225580 100644
--- a/gcc/config/i386/avx512vlbwintrin.h
+++ b/gcc/config/i386/avx512vlbwintrin.h
@@ -3055,6 +3055,24 @@ _mm_cmpeq_epi8_mask (__m128i __A, __m128i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epu8_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A,
+ (__v16qi) __B, 0,
+ (__mmask16) -1);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpeq_epu8_mask (__mmask16 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A,
+ (__v16qi) __B, 0,
+ __U);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpeq_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)
{
return (__mmask16) __builtin_ia32_pcmpeqb128_mask ((__v16qi) __A,
@@ -3064,6 +3082,15 @@ _mm_mask_cmpeq_epi8_mask (__mmask16 __U, __m128i __A,
__m128i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpeq_epu8_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A,
+ (__v32qi) __B, 0,
+ (__mmask32) -1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi8_mask (__m256i __A, __m256i __B)
{
return (__mmask32) __builtin_ia32_pcmpeqb256_mask ((__v32qi) __A,
@@ -3073,6 +3100,15 @@ _mm256_cmpeq_epi8_mask (__m256i __A, __m256i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpeq_epu8_mask (__mmask32 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A,
+ (__v32qi) __B, 0,
+ __U);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpeq_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)
{
return (__mmask32) __builtin_ia32_pcmpeqb256_mask ((__v32qi) __A,
@@ -3082,6 +3118,15 @@ _mm256_mask_cmpeq_epi8_mask (__mmask32 __U, __m256i __A,
__m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epu16_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A,
+ (__v8hi) __B, 0,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpeq_epi16_mask (__m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqw128_mask ((__v8hi) __A,
@@ -3091,6 +3136,14 @@ _mm_cmpeq_epi16_mask (__m128i __A, __m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpeq_epu16_mask (__mmask8 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A,
+ (__v8hi) __B, 0, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpeq_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqw128_mask ((__v8hi) __A,
@@ -3099,6 +3152,15 @@ _mm_mask_cmpeq_epi16_mask (__mmask8 __U, __m128i __A,
__m128i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpeq_epu16_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A,
+ (__v16hi) __B, 0,
+ (__mmask16) -1);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi16_mask (__m256i __A, __m256i __B)
{
return (__mmask16) __builtin_ia32_pcmpeqw256_mask ((__v16hi) __A,
@@ -3108,6 +3170,15 @@ _mm256_cmpeq_epi16_mask (__m256i __A, __m256i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpeq_epu16_mask (__mmask16 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A,
+ (__v16hi) __B, 0,
+ __U);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpeq_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
{
return (__mmask16) __builtin_ia32_pcmpeqw256_mask ((__v16hi) __A,
@@ -3117,6 +3188,15 @@ _mm256_mask_cmpeq_epi16_mask (__mmask16 __U, __m256i
__A, __m256i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epu8_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A,
+ (__v16qi) __B, 6,
+ (__mmask16) -1);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpgt_epi8_mask (__m128i __A, __m128i __B)
{
return (__mmask16) __builtin_ia32_pcmpgtb128_mask ((__v16qi) __A,
@@ -3126,6 +3206,15 @@ _mm_cmpgt_epi8_mask (__m128i __A, __m128i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpgt_epu8_mask (__mmask16 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __A,
+ (__v16qi) __B, 6,
+ __U);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpgt_epi8_mask (__mmask16 __U, __m128i __A, __m128i __B)
{
return (__mmask16) __builtin_ia32_pcmpgtb128_mask ((__v16qi) __A,
@@ -3135,6 +3224,15 @@ _mm_mask_cmpgt_epi8_mask (__mmask16 __U, __m128i __A,
__m128i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpgt_epu8_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A,
+ (__v32qi) __B, 6,
+ (__mmask32) -1);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi8_mask (__m256i __A, __m256i __B)
{
return (__mmask32) __builtin_ia32_pcmpgtb256_mask ((__v32qi) __A,
@@ -3144,6 +3242,15 @@ _mm256_cmpgt_epi8_mask (__m256i __A, __m256i __B)
extern __inline __mmask32
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpgt_epu8_mask (__mmask32 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask32) __builtin_ia32_ucmpb256_mask ((__v32qi) __A,
+ (__v32qi) __B, 6,
+ __U);
+}
+
+extern __inline __mmask32
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpgt_epi8_mask (__mmask32 __U, __m256i __A, __m256i __B)
{
return (__mmask32) __builtin_ia32_pcmpgtb256_mask ((__v32qi) __A,
@@ -3153,6 +3260,15 @@ _mm256_mask_cmpgt_epi8_mask (__mmask32 __U, __m256i __A,
__m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epu16_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A,
+ (__v8hi) __B, 6,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpgt_epi16_mask (__m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtw128_mask ((__v8hi) __A,
@@ -3162,6 +3278,14 @@ _mm_cmpgt_epi16_mask (__m128i __A, __m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpgt_epu16_mask (__mmask8 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __A,
+ (__v8hi) __B, 6, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpgt_epi16_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtw128_mask ((__v8hi) __A,
@@ -3170,6 +3294,15 @@ _mm_mask_cmpgt_epi16_mask (__mmask8 __U, __m128i __A,
__m128i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpgt_epu16_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A,
+ (__v16hi) __B, 6,
+ (__mmask16) -1);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi16_mask (__m256i __A, __m256i __B)
{
return (__mmask16) __builtin_ia32_pcmpgtw256_mask ((__v16hi) __A,
@@ -3179,6 +3312,15 @@ _mm256_cmpgt_epi16_mask (__m256i __A, __m256i __B)
extern __inline __mmask16
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpgt_epu16_mask (__mmask16 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask16) __builtin_ia32_ucmpw256_mask ((__v16hi) __A,
+ (__v16hi) __B, 6,
+ __U);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpgt_epi16_mask (__mmask16 __U, __m256i __A, __m256i __B)
{
return (__mmask16) __builtin_ia32_pcmpgtw256_mask ((__v16hi) __A,
@@ -4216,6 +4358,294 @@ _mm_mask_packs_epi32 (__m128i __W, __mmask16 __M,
__m128i __A,
(__v8hi) __W, __M);
}
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 4,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 1,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 5,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epu8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_ucmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 2,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epu16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 4,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 1,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 5,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epi8_mask (__mmask16 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask16) __builtin_ia32_cmpb128_mask ((__v16qi) __X,
+ (__v16qi) __Y, 2,
+ (__mmask16) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epi16_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw128_mask ((__v8hi) __X,
+ (__v8hi) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epu8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epu16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epi8_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpb256_mask ((__v32qi) __X,
+ (__v32qi) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epi16_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpw256_mask ((__v16hi) __X,
+ (__v16hi) __Y, 2,
+ (__mmask8) __M);
+}
+
#ifdef __DISABLE_AVX512VLBW__
#undef __DISABLE_AVX512VLBW__
#pragma GCC pop_options
diff --git a/gcc/config/i386/avx512vlintrin.h b/gcc/config/i386/avx512vlintrin.h
index 2f5e048..f39f7f3 100644
--- a/gcc/config/i386/avx512vlintrin.h
+++ b/gcc/config/i386/avx512vlintrin.h
@@ -5360,6 +5360,15 @@ _mm256_maskz_unpacklo_epi64 (__mmask8 __U, __m256i __A,
__m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epu32_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A,
+ (__v4si) __B, 0,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpeq_epi32_mask (__m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqd128_mask ((__v4si) __A,
@@ -5369,6 +5378,14 @@ _mm_cmpeq_epi32_mask (__m128i __A, __m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpeq_epu32_mask (__mmask8 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A,
+ (__v4si) __B, 0, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpeq_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqd128_mask ((__v4si) __A,
@@ -5377,6 +5394,15 @@ _mm_mask_cmpeq_epi32_mask (__mmask8 __U, __m128i __A,
__m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpeq_epu32_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A,
+ (__v8si) __B, 0,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi32_mask (__m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqd256_mask ((__v8si) __A,
@@ -5386,6 +5412,14 @@ _mm256_cmpeq_epi32_mask (__m256i __A, __m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpeq_epu32_mask (__mmask8 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A,
+ (__v8si) __B, 0, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpeq_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqd256_mask ((__v8si) __A,
@@ -5394,6 +5428,15 @@ _mm256_mask_cmpeq_epi32_mask (__mmask8 __U, __m256i __A,
__m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpeq_epu64_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A,
+ (__v2di) __B, 0,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpeq_epi64_mask (__m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqq128_mask ((__v2di) __A,
@@ -5403,6 +5446,14 @@ _mm_cmpeq_epi64_mask (__m128i __A, __m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpeq_epu64_mask (__mmask8 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A,
+ (__v2di) __B, 0, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpeq_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqq128_mask ((__v2di) __A,
@@ -5411,6 +5462,15 @@ _mm_mask_cmpeq_epi64_mask (__mmask8 __U, __m128i __A,
__m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpeq_epu64_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A,
+ (__v4di) __B, 0,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpeq_epi64_mask (__m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqq256_mask ((__v4di) __A,
@@ -5420,6 +5480,14 @@ _mm256_cmpeq_epi64_mask (__m256i __A, __m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpeq_epu64_mask (__mmask8 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A,
+ (__v4di) __B, 0, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpeq_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpeqq256_mask ((__v4di) __A,
@@ -5428,6 +5496,15 @@ _mm256_mask_cmpeq_epi64_mask (__mmask8 __U, __m256i __A,
__m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epu32_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A,
+ (__v4si) __B, 6,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpgt_epi32_mask (__m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtd128_mask ((__v4si) __A,
@@ -5437,6 +5514,14 @@ _mm_cmpgt_epi32_mask (__m128i __A, __m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpgt_epu32_mask (__mmask8 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __A,
+ (__v4si) __B, 6, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpgt_epi32_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtd128_mask ((__v4si) __A,
@@ -5445,6 +5530,15 @@ _mm_mask_cmpgt_epi32_mask (__mmask8 __U, __m128i __A,
__m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpgt_epu32_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A,
+ (__v8si) __B, 6,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi32_mask (__m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtd256_mask ((__v8si) __A,
@@ -5454,6 +5548,14 @@ _mm256_cmpgt_epi32_mask (__m256i __A, __m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpgt_epu32_mask (__mmask8 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __A,
+ (__v8si) __B, 6, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpgt_epi32_mask (__mmask8 __U, __m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtd256_mask ((__v8si) __A,
@@ -5462,6 +5564,15 @@ _mm256_mask_cmpgt_epi32_mask (__mmask8 __U, __m256i __A,
__m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cmpgt_epu64_mask (__m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A,
+ (__v2di) __B, 6,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpgt_epi64_mask (__m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtq128_mask ((__v2di) __A,
@@ -5471,6 +5582,14 @@ _mm_cmpgt_epi64_mask (__m128i __A, __m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpgt_epu64_mask (__mmask8 __U, __m128i __A, __m128i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __A,
+ (__v2di) __B, 6, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_cmpgt_epi64_mask (__mmask8 __U, __m128i __A, __m128i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtq128_mask ((__v2di) __A,
@@ -5479,6 +5598,15 @@ _mm_mask_cmpgt_epi64_mask (__mmask8 __U, __m128i __A,
__m128i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cmpgt_epu64_mask (__m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A,
+ (__v4di) __B, 6,
+ (__mmask8) -1);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpgt_epi64_mask (__m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtq256_mask ((__v4di) __A,
@@ -5488,6 +5616,14 @@ _mm256_cmpgt_epi64_mask (__m256i __A, __m256i __B)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpgt_epu64_mask (__mmask8 __U, __m256i __A, __m256i __B)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __A,
+ (__v4di) __B, 6, __U);
+}
+
+extern __inline __mmask8
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_cmpgt_epi64_mask (__mmask8 __U, __m256i __A, __m256i __B)
{
return (__mmask8) __builtin_ia32_pcmpgtq256_mask ((__v4di) __A,
@@ -11673,6 +11809,15 @@ _mm256_permutex_pd (__m256d __X, const int __M)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpneq_epu32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
@@ -11682,6 +11827,15 @@ _mm256_cmpneq_epu32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmplt_epu32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
@@ -11691,6 +11845,15 @@ _mm256_cmplt_epu32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpge_epu32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
@@ -11700,6 +11863,15 @@ _mm256_cmpge_epu32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epu32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmple_epu32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd256_mask ((__v8si) __X,
@@ -11709,6 +11881,15 @@ _mm256_cmple_epu32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpneq_epu64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
@@ -11718,6 +11899,15 @@ _mm256_cmpneq_epu64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmplt_epu64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
@@ -11727,6 +11917,15 @@ _mm256_cmplt_epu64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpge_epu64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
@@ -11736,6 +11935,15 @@ _mm256_cmpge_epu64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epu64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmple_epu64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq256_mask ((__v4di) __X,
@@ -11745,6 +11953,15 @@ _mm256_cmple_epu64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpneq_epi32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
@@ -11754,6 +11971,15 @@ _mm256_cmpneq_epi32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmplt_epi32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
@@ -11763,6 +11989,15 @@ _mm256_cmplt_epi32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpge_epi32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
@@ -11772,6 +12007,15 @@ _mm256_cmpge_epi32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epi32_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
+ (__v8si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmple_epi32_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpd256_mask ((__v8si) __X,
@@ -11781,6 +12025,15 @@ _mm256_cmple_epi32_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpneq_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpneq_epi64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
@@ -11790,6 +12043,15 @@ _mm256_cmpneq_epi64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmplt_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmplt_epi64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
@@ -11799,6 +12061,15 @@ _mm256_cmplt_epi64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmpge_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmpge_epi64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
@@ -11808,6 +12079,15 @@ _mm256_cmpge_epi64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cmple_epi64_mask (__mmask8 __M, __m256i __X, __m256i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
+ (__v4di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm256_cmple_epi64_mask (__m256i __X, __m256i __Y)
{
return (__mmask8) __builtin_ia32_cmpq256_mask ((__v4di) __X,
@@ -11817,6 +12097,15 @@ _mm256_cmple_epi64_mask (__m256i __X, __m256i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpneq_epu32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
@@ -11826,6 +12115,15 @@ _mm_cmpneq_epu32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmplt_epu32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
@@ -11835,6 +12133,15 @@ _mm_cmplt_epu32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpge_epu32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
@@ -11844,6 +12151,15 @@ _mm_cmpge_epu32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epu32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmple_epu32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpd128_mask ((__v4si) __X,
@@ -11853,6 +12169,15 @@ _mm_cmple_epu32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpneq_epu64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
@@ -11862,6 +12187,15 @@ _mm_cmpneq_epu64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmplt_epu64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
@@ -11871,6 +12205,15 @@ _mm_cmplt_epu64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpge_epu64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
@@ -11880,6 +12223,15 @@ _mm_cmpge_epu64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epu64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmple_epu64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_ucmpq128_mask ((__v2di) __X,
@@ -11889,6 +12241,15 @@ _mm_cmple_epu64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpneq_epi32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
@@ -11898,6 +12259,15 @@ _mm_cmpneq_epi32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmplt_epi32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
@@ -11907,6 +12277,15 @@ _mm_cmplt_epi32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpge_epi32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
@@ -11916,6 +12295,15 @@ _mm_cmpge_epi32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epi32_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
+ (__v4si) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmple_epi32_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpd128_mask ((__v4si) __X,
@@ -11925,6 +12313,15 @@ _mm_cmple_epi32_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpneq_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 4,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpneq_epi64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
@@ -11934,6 +12331,15 @@ _mm_cmpneq_epi64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmplt_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 1,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmplt_epi64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
@@ -11943,6 +12349,15 @@ _mm_cmplt_epi64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmpge_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 5,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmpge_epi64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
@@ -11952,6 +12367,15 @@ _mm_cmpge_epi64_mask (__m128i __X, __m128i __Y)
extern __inline __mmask8
__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cmple_epi64_mask (__mmask8 __M, __m128i __X, __m128i __Y)
+{
+ return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
+ (__v2di) __Y, 2,
+ (__mmask8) __M);
+}
+
+extern __inline __mmask8
+ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
_mm_cmple_epi64_mask (__m128i __X, __m128i __Y)
{
return (__mmask8) __builtin_ia32_cmpq128_mask ((__v2di) __X,
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c
new file mode 100644
index 0000000..6ec32e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmpeq_epu8_mask (x128, x128);
+ m32 = _mm256_cmpeq_epu8_mask (x256, x256);
+ m64 = _mm512_cmpeq_epu8_mask (x512, x512);
+ m16 = _mm_mask_cmpeq_epu8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmpeq_epu8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmpeq_epu8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c
new file mode 100644
index 0000000..06f1c99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequb-2.c
@@ -0,0 +1,52 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] == s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+ res1 = 0;
+ res2 = 0;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpeq_epu8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpeq_epu8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c
new file mode 100644
index 0000000..2cd140e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmpeq_epu16_mask (x128, x128);
+ m8 = _mm_mask_cmpeq_epu16_mask (3, x128, x128);
+ m16 = _mm256_cmpeq_epu16_mask (x256, x256);
+ m16 = _mm256_mask_cmpeq_epu16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmpeq_epu16_mask (3, x512, x512);
+ m32 = _mm512_cmpeq_epu16_mask (x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c
new file mode 100644
index 0000000..3fc0e7d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpequw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] == s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpeq_epu16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpeq_epu16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c
new file mode 100644
index 0000000..b5345e04b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmpge_epi8_mask (x128, x128);
+ m32 = _mm256_cmpge_epi8_mask (x256, x256);
+ m64 = _mm512_cmpge_epi8_mask (x512, x512);
+ m16 = _mm_mask_cmpge_epi8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmpge_epi8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmpge_epi8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c
new file mode 100644
index 0000000..fe28ffb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeb-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, char *s1, char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] >= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpge_epi8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpge_epi8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c
new file mode 100644
index 0000000..93155d7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmpge_epu8_mask (x128, x128);
+ m32 = _mm256_cmpge_epu8_mask (x256, x256);
+ m64 = _mm512_cmpge_epu8_mask (x512, x512);
+ m16 = _mm_mask_cmpge_epu8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmpge_epu8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmpge_epu8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c
new file mode 100644
index 0000000..29a88c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeub-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] >= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpge_epu8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpge_epu8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c
new file mode 100644
index 0000000..b2b1b8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmpge_epu16_mask (x128, x128);
+ m16 = _mm256_cmpge_epu16_mask (x256, x256);
+ m32 = _mm512_cmpge_epu16_mask (x512, x512);
+ m8 = _mm_mask_cmpge_epu16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmpge_epu16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmpge_epu16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c
new file mode 100644
index 0000000..b0105aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgeuw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] >= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpge_epu16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpge_epu16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c
new file mode 100644
index 0000000..1b9b3a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmpge_epi16_mask (x128, x128);
+ m16 = _mm256_cmpge_epi16_mask (x256, x256);
+ m32 = _mm512_cmpge_epi16_mask (x512, x512);
+ m8 = _mm_mask_cmpge_epi16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmpge_epi16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmpge_epi16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c
new file mode 100644
index 0000000..6b94030
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgew-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, short *s1, short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] >= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpge_epi16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpge_epi16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c
new file mode 100644
index 0000000..c2a78c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmpgt_epu8_mask (x128, x128);
+ m32 = _mm256_cmpgt_epu8_mask (x256, x256);
+ m64 = _mm512_cmpgt_epu8_mask (x512, x512);
+ m16 = _mm_mask_cmpgt_epu8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmpgt_epu8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmpgt_epu8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c
new file mode 100644
index 0000000..a0f1508
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtub-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] > s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpgt_epu8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpgt_epu8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c
new file mode 100644
index 0000000..7b86082
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmpgt_epu16_mask (x128, x128);
+ m16 = _mm256_cmpgt_epu16_mask (x256, x256);
+ m32 = _mm512_cmpgt_epu16_mask (x512, x512);
+ m8 = _mm_mask_cmpgt_epu16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmpgt_epu16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmpgt_epu16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c
new file mode 100644
index 0000000..e11be51
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpgtuw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] > s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpgt_epu16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpgt_epu16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c
new file mode 100644
index 0000000..bb8fb34
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmple_epi8_mask (x128, x128);
+ m32 = _mm256_cmple_epi8_mask (x256, x256);
+ m64 = _mm512_cmple_epi8_mask (x512, x512);
+ m16 = _mm_mask_cmple_epi8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmple_epi8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmple_epi8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c
new file mode 100644
index 0000000..45caba4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleb-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, char *s1, char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] <= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmple_epi8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmple_epi8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c
new file mode 100644
index 0000000..15eb02a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmple_epu8_mask (x128, x128);
+ m32 = _mm256_cmple_epu8_mask (x256, x256);
+ m64 = _mm512_cmple_epu8_mask (x512, x512);
+ m16 = _mm_mask_cmple_epu8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmple_epu8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmple_epu8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c
new file mode 100644
index 0000000..1145dd5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleub-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] <= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmple_epu8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmple_epu8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c
new file mode 100644
index 0000000..e26cd6f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmple_epu16_mask (x128, x128);
+ m16 = _mm256_cmple_epu16_mask (x256, x256);
+ m32 = _mm512_cmple_epu16_mask (x512, x512);
+ m8 = _mm_mask_cmple_epu16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmple_epu16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmple_epu16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c
new file mode 100644
index 0000000..6402836
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpleuw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] <= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmple_epu16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmple_epu16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c
new file mode 100644
index 0000000..5e3b123
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmple_epi16_mask (x128, x128);
+ m16 = _mm256_cmple_epi16_mask (x256, x256);
+ m32 = _mm512_cmple_epi16_mask (x512, x512);
+ m8 = _mm_mask_cmple_epi16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmple_epi16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmple_epi16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c
new file mode 100644
index 0000000..5ee845a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmplew-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, short *s1, short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] <= s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmple_epi16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmple_epi16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c
new file mode 100644
index 0000000..9760cf6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmplt_epi8_mask (x128, x128);
+ m32 = _mm256_cmplt_epi8_mask (x256, x256);
+ m64 = _mm512_cmplt_epi8_mask (x512, x512);
+ m16 = _mm_mask_cmplt_epi8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmplt_epi8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmplt_epi8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c
new file mode 100644
index 0000000..a53dd2d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltb-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, char *s1, char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] < s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmplt_epi8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmplt_epi8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c
new file mode 100644
index 0000000..9da0db18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmplt_epu8_mask (x128, x128);
+ m32 = _mm256_cmplt_epu8_mask (x256, x256);
+ m64 = _mm512_cmplt_epu8_mask (x512, x512);
+ m16 = _mm_mask_cmplt_epu8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmplt_epu8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmplt_epu8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c
new file mode 100644
index 0000000..3d83967
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltub-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] < s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmplt_epu8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmplt_epu8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c
new file mode 100644
index 0000000..18e8d30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmplt_epu16_mask (x128, x128);
+ m16 = _mm256_cmplt_epu16_mask (x256, x256);
+ m32 = _mm512_cmplt_epu16_mask (x512, x512);
+ m8 = _mm_mask_cmplt_epu16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmplt_epu16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmplt_epu16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c
new file mode 100644
index 0000000..82b997c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltuw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] < s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmplt_epu16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmplt_epu16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c
new file mode 100644
index 0000000..222fbff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmplt_epi16_mask (x128, x128);
+ m16 = _mm256_cmplt_epi16_mask (x256, x256);
+ m32 = _mm512_cmplt_epi16_mask (x512, x512);
+ m8 = _mm_mask_cmplt_epi16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmplt_epi16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmplt_epi16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c
new file mode 100644
index 0000000..387d7bb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpltw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, short *s1, short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] < s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmplt_epi16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmplt_epi16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c
new file mode 100644
index 0000000..0c13660
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpb\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmpneq_epi8_mask (x128, x128);
+ m32 = _mm256_cmpneq_epi8_mask (x256, x256);
+ m64 = _mm512_cmpneq_epi8_mask (x512, x512);
+ m16 = _mm_mask_cmpneq_epi8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmpneq_epi8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmpneq_epi8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c
new file mode 100644
index 0000000..db43880
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqb-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, char *s1, char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] != s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpneq_epi8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpneq_epi8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c
new file mode 100644
index 0000000..6a671fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpub\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+volatile __mmask64 m64;
+
+void extern
+avx512bw_test (void)
+{
+ m16 = _mm_cmpneq_epu8_mask (x128, x128);
+ m32 = _mm256_cmpneq_epu8_mask (x256, x256);
+ m64 = _mm512_cmpneq_epu8_mask (x512, x512);
+ m16 = _mm_mask_cmpneq_epu8_mask (3, x128, x128);
+ m32 = _mm256_mask_cmpneq_epu8_mask (3, x256, x256);
+ m64 = _mm512_mask_cmpneq_epu8_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c
new file mode 100644
index 0000000..da13d7c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequb-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 8)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned char *s1, unsigned char *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] != s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_b) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpneq_epu8_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpneq_epu8_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c
new file mode 100644
index 0000000..7ca8cfc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmpneq_epu16_mask (x128, x128);
+ m16 = _mm256_cmpneq_epu16_mask (x256, x256);
+ m32 = _mm512_cmpneq_epu16_mask (x512, x512);
+ m8 = _mm_mask_cmpneq_epu16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmpneq_epu16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmpneq_epu16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c
new file mode 100644
index 0000000..e8b8c61
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpnequw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, unsigned short *s1, unsigned short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] != s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpneq_epu16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpneq_epu16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c
new file mode 100644
index 0000000..46188e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512bw -mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%zmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpw\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m512i x512;
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+volatile __mmask32 m32;
+
+void extern
+avx512bw_test (void)
+{
+ m8 = _mm_cmpneq_epi16_mask (x128, x128);
+ m16 = _mm256_cmpneq_epi16_mask (x256, x256);
+ m32 = _mm512_cmpneq_epi16_mask (x512, x512);
+ m8 = _mm_mask_cmpneq_epi16_mask (3, x128, x128);
+ m16 = _mm256_mask_cmpneq_epi16_mask (3, x256, x256);
+ m32 = _mm512_mask_cmpneq_epi16_mask (3, x512, x512);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c
b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c
new file mode 100644
index 0000000..0b5005f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512bw-vpcmpneqw-2.c
@@ -0,0 +1,50 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -DAVX512BW" } */
+/* { dg-require-effective-target avx512bw } */
+
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#include "avx512f-mask-type.h"
+
+void
+CALC (MASK_TYPE *r, short *s1, short *s2)
+{
+ int i;
+ *r = 0;
+ MASK_TYPE one = 1;
+
+ for (i = 0; i < SIZE; i++)
+ if (s1[i] != s2[i])
+ *r = *r | (one << i);
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE res_ref, res1, res2;
+ MASK_TYPE mask = MASK_VALUE;
+
+ for (i = 0; i < SIZE / 2; i++)
+ {
+ src1.a[i * 2] = i;
+ src1.a[i * 2 + 1] = i * i;
+ src2.a[i * 2] = 2 * i;
+ src2.a[i * 2 + 1] = i * i;
+ }
+
+ res1 = INTRINSIC (_cmpneq_epi16_mask) (src1.x, src2.x);
+ res2 = INTRINSIC (_mask_cmpneq_epi16_mask) (mask, src1.x, src2.x);
+
+ CALC (&res_ref, src1.a, src2.a);
+
+ if (res_ref != res1)
+ abort ();
+
+ res_ref &= mask;
+
+ if (res_ref != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c
new file mode 100644
index 0000000..87c7d47
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequb-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpequb-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpequb-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c
new file mode 100644
index 0000000..b472708
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */
+/* { dg-final { scan-assembler-times "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n^k\]*%k\[1-7\]\[^\{\]" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpeq_epu32_mask (x128, x128);
+ m = _mm256_cmpeq_epu32_mask (x256, x256);
+ m = _mm_mask_cmpeq_epu32_mask (3, x128, x128);
+ m = _mm256_mask_cmpeq_epu32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c
new file mode 100644
index 0000000..364c45e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequd-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpequd-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpequd-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c
new file mode 100644
index 0000000..4b4c6c8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpeq_epu64_mask (x128, x128);
+ m = _mm256_cmpeq_epu64_mask (x256, x256);
+ m = _mm_mask_cmpeq_epu64_mask (3, x128, x128);
+ m = _mm256_mask_cmpeq_epu64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c
new file mode 100644
index 0000000..32a9b1f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequq-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpequq-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpequq-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c
new file mode 100644
index 0000000..e903c49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpequw-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpequw-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpequw-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c
new file mode 100644
index 0000000..077c58b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpged-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpge_epi32_mask (x128, x128);
+ m = _mm256_cmpge_epi32_mask (x256, x256);
+ m = _mm_mask_cmpge_epi32_mask (3, x128, x128);
+ m = _mm256_mask_cmpge_epi32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c
new file mode 100644
index 0000000..13d18fe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpge_epi64_mask (x128, x128);
+ m = _mm256_cmpge_epi64_mask (x256, x256);
+ m = _mm_mask_cmpge_epi64_mask (3, x128, x128);
+ m = _mm256_mask_cmpge_epi64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c
new file mode 100644
index 0000000..4084cad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeud-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpge_epu32_mask (x128, x128);
+ m = _mm256_cmpge_epu32_mask (x256, x256);
+ m = _mm_mask_cmpge_epu32_mask (3, x128, x128);
+ m = _mm256_mask_cmpge_epu32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c
new file mode 100644
index 0000000..bd8aa31
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgeuq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpge_epu64_mask (x128, x128);
+ m = _mm256_cmpge_epu64_mask (x256, x256);
+ m = _mm_mask_cmpge_epu64_mask (3, x128, x128);
+ m = _mm256_mask_cmpge_epu64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c
new file mode 100644
index 0000000..f4fa61a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtub-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpgtub-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpgtub-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c
new file mode 100644
index 0000000..273781a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpgt_epu32_mask (x128, x128);
+ m = _mm256_cmpgt_epu32_mask (x256, x256);
+ m = _mm_mask_cmpgt_epu32_mask (3, x128, x128);
+ m = _mm256_mask_cmpgt_epu32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c
new file mode 100644
index 0000000..7a9117f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtud-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpgtud-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpgtud-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c
new file mode 100644
index 0000000..2d6e64c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpgt_epu64_mask (x128, x128);
+ m = _mm256_cmpgt_epu64_mask (x256, x256);
+ m = _mm_mask_cmpgt_epu64_mask (3, x128, x128);
+ m = _mm256_mask_cmpgt_epu64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c
new file mode 100644
index 0000000..c0bf472
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuq-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpgtuq-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpcmpgtuq-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c
new file mode 100644
index 0000000..b516b66
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpgtuw-2.c
@@ -0,0 +1,14 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512bw -mavx512vl -DAVX512VL" } */
+/* { dg-require-effective-target avx512vl } */
+
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpgtuw-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512bw-vpcmpgtuw-2.c"
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c
new file mode 100644
index 0000000..928e836
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpled-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmple_epi32_mask (x128, x128);
+ m = _mm256_cmple_epi32_mask (x256, x256);
+ m = _mm_mask_cmple_epi32_mask (3, x128, x128);
+ m = _mm256_mask_cmple_epi32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c
new file mode 100644
index 0000000..0a8270b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmple_epi64_mask (x128, x128);
+ m = _mm256_cmple_epi64_mask (x256, x256);
+ m = _mm_mask_cmple_epi64_mask (3, x128, x128);
+ m = _mm256_mask_cmple_epi64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c
new file mode 100644
index 0000000..fb93bac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleud-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmple_epu32_mask (x128, x128);
+ m = _mm256_cmple_epu32_mask (x256, x256);
+ m = _mm_mask_cmple_epu32_mask (3, x128, x128);
+ m = _mm256_mask_cmple_epu32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c
new file mode 100644
index 0000000..2f73af8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpleuq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmple_epu64_mask (x128, x128);
+ m = _mm256_cmple_epu64_mask (x256, x256);
+ m = _mm_mask_cmple_epu64_mask (3, x128, x128);
+ m = _mm256_mask_cmple_epu64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c
new file mode 100644
index 0000000..9b1c8aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltd-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmplt_epi32_mask (x128, x128);
+ m = _mm256_cmplt_epi32_mask (x256, x256);
+ m = _mm_mask_cmplt_epi32_mask (3, x128, x128);
+ m = _mm256_mask_cmplt_epi32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c
new file mode 100644
index 0000000..187cf9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmplt_epi64_mask (x128, x128);
+ m = _mm256_cmplt_epi64_mask (x256, x256);
+ m = _mm_mask_cmplt_epi64_mask (3, x128, x128);
+ m = _mm256_mask_cmplt_epi64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c
new file mode 100644
index 0000000..7468033
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltud-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmplt_epu32_mask (x128, x128);
+ m = _mm256_cmplt_epu32_mask (x256, x256);
+ m = _mm_mask_cmplt_epu32_mask (3, x128, x128);
+ m = _mm256_mask_cmplt_epu32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c
new file mode 100644
index 0000000..d3af5e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpltuq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmplt_epu64_mask (x128, x128);
+ m = _mm256_cmplt_epu64_mask (x256, x256);
+ m = _mm_mask_cmplt_epu64_mask (3, x128, x128);
+ m = _mm256_mask_cmplt_epu64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c
new file mode 100644
index 0000000..6b57ac0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqd-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpd\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpneq_epi32_mask (x128, x128);
+ m = _mm256_cmpneq_epi32_mask (x256, x256);
+ m = _mm_mask_cmpneq_epi32_mask (3, x128, x128);
+ m = _mm256_mask_cmpneq_epi32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c
new file mode 100644
index 0000000..eeacd08
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpneqq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpneq_epi64_mask (x128, x128);
+ m = _mm256_cmpneq_epi64_mask (x256, x256);
+ m = _mm_mask_cmpneq_epi64_mask (3, x128, x128);
+ m = _mm256_mask_cmpneq_epi64_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c
new file mode 100644
index 0000000..f834029
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequd-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpud\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpneq_epu32_mask (x128, x128);
+ m = _mm256_cmpneq_epu32_mask (x256, x256);
+ m = _mm_mask_cmpneq_epu32_mask (3, x128, x128);
+ m = _mm256_mask_cmpneq_epu32_mask (3, x256, x256);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c
b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c
new file mode 100644
index 0000000..a2472ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpcmpnequq-1.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -O2" } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\[^\{\]" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%ymm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+/* { dg-final { scan-assembler "vpcmpuq\[
\\t\]+\[^\n\]*%xmm\[0-9\]\[^\n\]*%k\[1-7\]\{%k\[1-7\]\}" } } */
+
+#include <immintrin.h>
+
+volatile __m256i x256;
+volatile __m128i x128;
+volatile __mmask8 m;
+
+void extern
+avx512vl_test (void)
+{
+ m = _mm_cmpneq_epu64_mask (x128, x128);
+ m = _mm256_cmpneq_epu64_mask (x256, x256);
+ m = _mm_mask_cmpneq_epu64_mask (3, x128, x128);
+ m = _mm256_mask_cmpneq_epu64_mask (3, x256, x256);
+}
