>From bf51463edee1d161ff8e03cf0af0c3ff8b258305 Mon Sep 17 00:00:00 2001 From: Maxim Kuvyrkov Date: Sat, 29 Mar 2014 07:12:52 +1300 Subject: [PATCH 5/8] Enable max_issue for AArch32 and AArch64 * config/aarch64/aarch64.c (aarch64_sched_first_cycle_multipass_dfa_lookahead): Implement hook. (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define. * config/arm/arm.c (arm_first_cycle_multipass_dfa_lookahead): Implement hook. (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Define. --- gcc/config/aarch64/aarch64.c | 12 ++++++++++++ gcc/config/arm/arm.c | 15 +++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 2ad5c28..1512418 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -6077,6 +6077,14 @@ aarch64_sched_issue_rate (void) return aarch64_tune_params->issue_rate; } +static int +aarch64_sched_first_cycle_multipass_dfa_lookahead (void) +{ + int issue_rate = aarch64_sched_issue_rate (); + + return issue_rate > 1 ? issue_rate : 0; +} + /* Vectorizer cost model target hooks. */ /* Implement targetm.vectorize.builtin_vectorization_cost. */ @@ -10136,6 +10144,10 @@ aarch64_asan_shadow_offset (void) #undef TARGET_SCHED_ISSUE_RATE #define TARGET_SCHED_ISSUE_RATE aarch64_sched_issue_rate +#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD +#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ + aarch64_sched_first_cycle_multipass_dfa_lookahead + #undef TARGET_TRAMPOLINE_INIT #define TARGET_TRAMPOLINE_INIT aarch64_trampoline_init diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 1ee0eb3..0f15c99 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -246,6 +246,7 @@ static void arm_option_override (void); static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode); static bool arm_cannot_copy_insn_p (rtx_insn *); static int arm_issue_rate (void); +static int arm_first_cycle_multipass_dfa_lookahead (void); static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static bool arm_output_addr_const_extra (FILE *, rtx); static bool arm_allocate_stack_slots_for_args (void); @@ -591,6 +592,10 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_SCHED_ISSUE_RATE #define TARGET_SCHED_ISSUE_RATE arm_issue_rate +#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD +#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \ + arm_first_cycle_multipass_dfa_lookahead + #undef TARGET_MANGLE_TYPE #define TARGET_MANGLE_TYPE arm_mangle_type @@ -29888,6 +29893,16 @@ arm_issue_rate (void) } } +/* Return how many instructions should scheduler lookahead to choose the + best one. */ +static int +arm_first_cycle_multipass_dfa_lookahead (void) +{ + int issue_rate = arm_issue_rate (); + + return issue_rate > 1 ? issue_rate : 0; +} + /* A table and a function to perform ARM-specific name mangling for NEON vector types in order to conform to the AAPCS (see "Procedure Call Standard for the ARM Architecture", Appendix A). To qualify -- 1.7.9.5