On 26/08/14 23:18, Carrot Wei wrote: > Hi > > In insn pattern "*andim_ashift<mode>_bfiz", if the operands[2] is larger than > the size of register, gcc may generate invalid assembler code. If operands[2] > is larger than the size of the underlying type of INTVAL, the following insn > condition may also be undefined. > > "exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) >= 0 > && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0" > > It can be fixed by checking the value of operands[2] before using it. > > Passed regression test without failure. OK for trunk and 4.9 branch? > > thanks > Guozhi Wei > > > 2014-08-26 Guozhi Wei <car...@google.com> > > PR target/62262 > * config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Check the > shift > amount before using it. > > > 2014-08-26 Guozhi Wei <car...@google.com> > > PR target/62262 > * gcc.target/aarch64/pr62262.c: New test. >
OK. R.
