2014-08-15 Segher Boessenkool <seg...@kernel.crashing.org>
gcc/
* config/rs6000/rs6000.md (*boolcsi3_internal1, *boolcsi3_internal2
and split, *boolcsi3_internal3 and split): Delete.
(*boolcdi3_internal1, *boolcdi3_internal2 and split,
*boolcdi3_internal3 and split): Delete.
(*boolc<mode>3, *boolc<mode>3_dot, *boolc<mode>3_dot2): New.
---
gcc/config/rs6000/rs6000.md | 162 +++++++++++---------------------------------
1 file changed, 41 insertions(+), 121 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2e4df11..46f4f55 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -3298,71 +3298,59 @@ (define_split
})
-(define_insn "*boolcsi3_internal1"
- [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
- (match_operator:SI 3 "boolean_operator"
- [(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
- (match_operand:SI 2 "gpc_reg_operand" "r")]))]
+(define_insn "*boolc<mode>3"
+ [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
+ (match_operator:GPR 3 "boolean_operator"
+ [(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r"))
+ (match_operand:GPR 1 "gpc_reg_operand" "r")]))]
""
- "%q3 %0,%2,%1")
+ "%q3 %0,%1,%2"
+ [(set_attr "type" "logical")])
-(define_insn "*boolcsi3_internal2"
- [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
- (compare:CC (match_operator:SI 4 "boolean_operator"
- [(not:SI (match_operand:SI 1 "gpc_reg_operand" "r,r"))
- (match_operand:SI 2 "gpc_reg_operand" "r,r")])
+(define_insn_and_split "*boolc<mode>3_dot"
+ [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
+ (compare:CC (match_operator:GPR 3 "boolean_operator"
+ [(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r")])
(const_int 0)))
- (clobber (match_scratch:SI 3 "=r,r"))]
- "TARGET_32BIT"
+ (clobber (match_scratch:GPR 0 "=r,r"))]
+ "<MODE>mode == Pmode && rs6000_gen_cell_microcode"
"@
- %q4. %3,%2,%1
+ %q3. %0,%1,%2
#"
- [(set_attr "type" "compare")
- (set_attr "length" "4,8")])
-
-(define_split
- [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
- (compare:CC (match_operator:SI 4 "boolean_operator"
- [(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
- (match_operand:SI 2 "gpc_reg_operand" "")])
- (const_int 0)))
- (clobber (match_scratch:SI 3 ""))]
- "TARGET_32BIT && reload_completed"
- [(set (match_dup 3) (match_dup 4))
- (set (match_dup 0)
- (compare:CC (match_dup 3)
+ "&& reload_completed && cc_reg_not_cr0_operand (operands[4], CCmode)"
+ [(set (match_dup 0)
+ (match_dup 3))
+ (set (match_dup 4)
+ (compare:CC (match_dup 0)
(const_int 0)))]
- "")
+ ""
+ [(set_attr "type" "logical")
+ (set_attr "dot" "yes")
+ (set_attr "length" "4,8")])
-(define_insn "*boolcsi3_internal3"
- [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
- (compare:CC (match_operator:SI 4 "boolean_operator"
- [(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
- (match_operand:SI 2 "gpc_reg_operand" "r,r")])
+(define_insn_and_split "*boolc<mode>3_dot2"
+ [(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
+ (compare:CC (match_operator:GPR 3 "boolean_operator"
+ [(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r")])
(const_int 0)))
- (set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
- (match_dup 4))]
- "TARGET_32BIT"
+ (set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
+ (match_dup 3))]
+ "<MODE>mode == Pmode && rs6000_gen_cell_microcode"
"@
- %q4. %0,%2,%1
+ %q3. %0,%1,%2
#"
- [(set_attr "type" "compare")
- (set_attr "length" "4,8")])
-
-(define_split
- [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")
- (compare:CC (match_operator:SI 4 "boolean_operator"
- [(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
- (match_operand:SI 2 "gpc_reg_operand" "")])
- (const_int 0)))
- (set (match_operand:SI 0 "gpc_reg_operand" "")
- (match_dup 4))]
- "TARGET_32BIT && reload_completed"
- [(set (match_dup 0) (match_dup 4))
- (set (match_dup 3)
+ "&& reload_completed && cc_reg_not_cr0_operand (operands[4], CCmode)"
+ [(set (match_dup 0)
+ (match_dup 3))
+ (set (match_dup 4)
(compare:CC (match_dup 0)
(const_int 0)))]
- "")
+ ""
+ [(set_attr "type" "logical")
+ (set_attr "dot" "yes")
+ (set_attr "length" "4,8")])
(define_insn "*boolccsi3_internal1"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
@@ -7840,74 +7828,6 @@ (define_split
build_mask64_2_operands (operands[2], &operands[5]);
}")
-(define_insn "*boolcdi3_internal1"
- [(set (match_operand:DI 0 "gpc_reg_operand" "=r")
- (match_operator:DI 3 "boolean_operator"
- [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
- (match_operand:DI 2 "gpc_reg_operand" "r")]))]
- "TARGET_POWERPC64"
- "%q3 %0,%2,%1")
-
-(define_insn "*boolcdi3_internal2"
- [(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
- (compare:CC (match_operator:DI 4 "boolean_operator"
- [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r,r"))
- (match_operand:DI 2 "gpc_reg_operand" "r,r")])
- (const_int 0)))
- (clobber (match_scratch:DI 3 "=r,r"))]
- "TARGET_64BIT"
- "@
- %q4. %3,%2,%1
- #"
- [(set_attr "type" "logical,compare")
- (set_attr "dot" "yes")
- (set_attr "length" "4,8")])
-
-(define_split
- [(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
- (compare:CC (match_operator:DI 4 "boolean_operator"
- [(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
- (match_operand:DI 2 "gpc_reg_operand" "")])
- (const_int 0)))
- (clobber (match_scratch:DI 3 ""))]
- "TARGET_POWERPC64 && reload_completed"
- [(set (match_dup 3) (match_dup 4))
- (set (match_dup 0)
- (compare:CC (match_dup 3)
- (const_int 0)))]
- "")
-
-(define_insn "*boolcdi3_internal3"
- [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
- (compare:CC (match_operator:DI 4 "boolean_operator"
- [(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
- (match_operand:DI 2 "gpc_reg_operand" "r,r")])
- (const_int 0)))
- (set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
- (match_dup 4))]
- "TARGET_64BIT"
- "@
- %q4. %0,%2,%1
- #"
- [(set_attr "type" "logical,compare")
- (set_attr "dot" "yes")
- (set_attr "length" "4,8")])
-
-(define_split
- [(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")
- (compare:CC (match_operator:DI 4 "boolean_operator"
- [(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
- (match_operand:DI 2 "gpc_reg_operand" "")])
- (const_int 0)))
- (set (match_operand:DI 0 "gpc_reg_operand" "")
- (match_dup 4))]
- "TARGET_POWERPC64 && reload_completed"
- [(set (match_dup 0) (match_dup 4))
- (set (match_dup 3)
- (compare:CC (match_dup 0)
- (const_int 0)))]
- "")
-
(define_insn "*boolccdi3_internal1"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(match_operator:DI 3 "boolean_operator"
--
1.8.1.4
