The G10 family doesn't support this opcode. Committed.
* config/rl78/rl78-expand.md (umulqihi3): Disable for G10.
* config/rl78/rl78-virt.md (umulhi3_shift_virt): Likewise.
(umulqihi3_virt): Likewise.
* config/rl78/rl78-real.md (umulhi3_shift_real): Likewise.
(umulqihi3_real): Likewise.
Index: config/rl78/rl78-expand.md
===================================================================
--- config/rl78/rl78-expand.md (revision 213995)
+++ config/rl78/rl78-expand.md (working copy)
@@ -145,8 +145,8 @@
[(set (match_operand:HI 0 "register_operand")
(mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand"))
(zero_extend:HI (match_operand:QI 2 "register_operand"))))]
+ "!TARGET_G10"
""
- ""
)
(define_expand "andqi3"
Index: config/rl78/rl78-real.md
===================================================================
--- config/rl78/rl78-real.md (revision 213995)
+++ config/rl78/rl78-real.md (working copy)
@@ -157,7 +157,7 @@
[(set (match_operand:HI 0 "register_operand" "=A,A")
(mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "0,0")
(match_operand:HI 2 "rl78_24_operand" "N,i")))]
- "rl78_real_insns_ok ()"
+ "rl78_real_insns_ok () && !TARGET_G10"
"@
shlw\t%0, 1
shlw\t%0, 2"
@@ -167,7 +167,7 @@
[(set (match_operand:HI 0 "nonimmediate_operand" "=A")
(mult:HI (zero_extend:HI (match_operand:QI 1 "general_operand" "%a"))
(zero_extend:HI (match_operand:QI 2 "general_operand" "x"))))]
- "rl78_real_insns_ok ()"
+ "rl78_real_insns_ok () && !TARGET_G10"
"mulu\t%2"
)
Index: config/rl78/rl78-virt.md
===================================================================
--- config/rl78/rl78-virt.md (revision 213995)
+++ config/rl78/rl78-virt.md (working copy)
@@ -91,7 +91,7 @@
[(set (match_operand:HI 0 "register_operand" "=vm")
(mult:HI (match_operand:HI 1 "rl78_nonfar_operand" "%vim")
(match_operand:HI 2 "rl78_24_operand" "Ni")))]
- "rl78_virt_insns_ok ()"
+ "rl78_virt_insns_ok () && !TARGET_G10"
"v.mulu\t%0, %1, %2"
[(set_attr "valloc" "umul")]
)
@@ -100,7 +100,7 @@
[(set (match_operand:HI 0 "register_operand" "=vm")
(mult:HI (zero_extend:HI (match_operand:QI 1 "rl78_nonfar_operand"
"%vim"))
(zero_extend:HI (match_operand:QI 2 "general_operand"
"vim"))))]
- "rl78_virt_insns_ok ()"
+ "rl78_virt_insns_ok () && !TARGET_G10"
"v.mulu\t%0, %2"
[(set_attr "valloc" "umul")]
)
