On 04/08/14 17:31, Kyrill Tkachov wrote: > Hi all, > > As part of other intrinsics-related messing around due to the > float64x1_t changes I noticed these can be (re)implemented relatively > easily. > > Tested on aarch64-none-elf and aarch64_be-none-elf to make sure the > lane-wise intrinsics do the right thing. > > Ok for trunk? > > 2014-08-04 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > * config/aarch64/arm_neon.h (vmul_f64): New intrinsic. > (vmuld_laneq_f64): Likewise. > (vmuls_laneq_f32): Likewise. > (vmul_n_f64): Likewise. > (vmuld_lane_f64): Reimplement in C. > (vmuls_lane_f32): Likewise. > > 2014-08-04 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > * gcc.target/aarch64/simd/vmul_f64_1.c: New test. > * gcc.target/aarch64/simd/vmul_n_f64_1.c: Likewise. > * gcc.target/aarch64/simd/vmuld_lane_f64_1.c: Likewise. > * gcc.target/aarch64/simd/vmuld_laneq_f64_1.c: Likewise. > * gcc.target/aarch64/simd/vmuls_lane_f32_1.c: Likewise. > * gcc.target/aarch64/simd/vmuls_laneq_f32_1.c: Likewise. > >
OK. R.
