On 22/07/14 17:29, Ramana Radhakrishnan wrote:
On Mon, Jul 14, 2014 at 11:11 AM, Jiong Wang <jiong.w...@arm.com> wrote:
currently the following testcases are disabled for arm target,
gcc.dg/ira-shrinkwrap-prep-1.c
gcc.dg/ira-shrinkwrap-prep-2.c
gcc.dg/pr10474.c
the reason is on arm target, register r3 is caller-saved. Normally it does
not need to be saved on entry by the prologue. However if we choose to save
it for padding then we may confuse the compiler into thinking a prologue
sequence
is required when in fact it is not. This will occur when shrink-wrapping if
r3
is used as a scratch register and there are no other callee-saved writes.
This situation can be avoided when other callee-saved registers are
available
and r3 is not mandatory if we choose a callee-saved register for padding.
Dejagnu improvements
===
-UNSUPPORTED: gcc.dg/ira-shrinkwrap-prep-1.c
-UNSUPPORTED: gcc.dg/ira-shrinkwrap-prep-2.c
+PASS: gcc.dg/ira-shrinkwrap-prep-1.c (test for excess errors)
+PASS: gcc.dg/ira-shrinkwrap-prep-1.c scan-rtl-dump ira "Will split live
ranges of parameters"
+PASS: gcc.dg/ira-shrinkwrap-prep-1.c scan-rtl-dump ira "Split live-range of
register"
+PASS: gcc.dg/ira-shrinkwrap-prep-1.c scan-rtl-dump pro_and_epilogue
"Performing shrink-wrapping"
+PASS: gcc.dg/ira-shrinkwrap-prep-2.c (test for excess errors)
+PASS: gcc.dg/ira-shrinkwrap-prep-2.c scan-rtl-dump ira "Will split live
ranges of parameters"
+PASS: gcc.dg/ira-shrinkwrap-prep-2.c scan-rtl-dump ira "Split live-range of
register"
+PASS: gcc.dg/ira-shrinkwrap-prep-2.c scan-rtl-dump pro_and_epilogue
"Performing shrink-wrapping"
-UNSUPPORTED: gcc.dg/pr10474.c
+PASS: gcc.dg/pr10474.c (test for excess errors)
+PASS: gcc.dg/pr10474.c scan-rtl-dump pro_and_epilogue "Performing
shrink-wrapping"
ok for trunk ?
This is OK
Ramana
Hi all,
I've committed this on Jiongs' behalf as r212927 with some minor
ChangeLog modifications to make it fit into the 80 character column limit:
2014-07-23 Jiong Wang <jiong.w...@arm.com>
* config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
callee-saved registers are available for padding purpose
and r3 is not mandatory, then prefer use those callee-saved
instead of r3.
2014-07-23 Jiong Wang <jiong.w...@arm.com>
* gcc.dg/ira-shrinkwrap-prep-1.c (target): Add arm_nothumb.
* gcc.dg/ira-shrinkwrap-prep-2.c (target): Likewise.
* gcc.dg/pr10474.c (target): Likewise.
Kyrill
thanks.
-- Jiong
gcc/
* config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
callee-saved
registers are available for padding purpose, and r3 is not mandatory,
then
prefer use those callee-saved instead of r3.
gcc/testsuite/
* gcc.dg/ira-shrinkwrap-prep-1.c (target): Add arm_nothumb
* gcc.dg/ira-shrinkwrap-prep-2.c (target): Add arm_nothumb
* gcc.dg/pr10474.c (target): Add arm_nothumb
