[AArch64/GCC][9/N] Use helper functions to handle multiple mode

[Jiong Wang]

This patch add several helper functions to handle function
invokation under different mode.

We will merge core/vectore register push/restore function
in later patches, so these helper functions are necessary.

*no functional change*

ok to install?

thanks.

gcc/
  * config/aarch64/aarch64.c (aarch64_gen_store_pair): New helper function.
  (aarch64_gen_load_pair): Likewise.
  (aarch64_save_or_restore_fprs): Use new helper functions.
  (aarch64_save_or_restore_callee_save_registers): Likewise.

>From 529eee0ee38d25e02efd84517e1ea2e8af4aa197 Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.w...@arm.com>
Date: Tue, 17 Jun 2014 22:10:00 +0100
Subject: [PATCH 09/19] [AArch64/GCC][9/20]Use helper functions to handle
 multiple mode

This patch add several helper functions to handle function invokation under
different mode.

We will merge core/vectore register push/restore function in later patches,
so these helper functions are necessary.

*no functional change*

2014-06-16  Jiong Wang <jiong.w...@arm.com>
	    Marcus Shawcroft  <marcus.shawcr...@arm.com>

gcc/
  * config/aarch64/aarch64.c (aarch64_gen_store_pair): New helper function.
  (aarch64_gen_load_pair): Likewise.
  (aarch64_save_or_restore_fprs): Use new helper functions.
  (aarch64_save_or_restore_callee_save_registers): Likewise.
---
 gcc/config/aarch64/aarch64.c |   42 ++++++++++++++++++++++++++++++++++++++----
 1 file changed, 38 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 0b6305b..c4ea9ec 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1913,6 +1913,40 @@ aarch64_next_callee_save (unsigned regno, unsigned limit)
   return regno;
 }
 
+static rtx
+aarch64_gen_store_pair (enum machine_mode mode, rtx mem1, rtx reg1, rtx mem2,
+			rtx reg2)
+{
+  switch (mode)
+    {
+    case DImode:
+      return gen_store_pairdi (mem1, reg1, mem2, reg2);
+
+    case DFmode:
+      return gen_store_pairdf (mem1, reg1, mem2, reg2);
+
+    default:
+      gcc_unreachable ();
+    }
+}
+
+static rtx
+aarch64_gen_load_pair (enum machine_mode mode, rtx reg1, rtx mem1, rtx reg2,
+		       rtx mem2)
+{
+  switch (mode)
+    {
+    case DImode:
+      return gen_load_pairdi (reg1, mem1, reg2, mem2);
+
+    case DFmode:
+      return gen_load_pairdf (reg1, mem1, reg2, mem2);
+
+    default:
+      gcc_unreachable ();
+    }
+}
+
 static void
 aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore)
 {
@@ -1946,10 +1980,10 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, bool restore)
 	  mem2 = gen_mem_ref (DFmode,
 			      plus_constant (Pmode, stack_pointer_rtx, offset));
 	  if (restore == false)
-	    insn = emit_insn (gen_store_pairdf (mem, reg, mem2, reg2));
+	    insn = emit_insn (aarch64_gen_store_pair (DFmode, mem, reg, mem2, reg2));
 	  else
 	    {
-	      insn = emit_insn (gen_load_pairdf (reg, mem, reg2, mem2));
+	      insn = emit_insn (aarch64_gen_load_pair (DFmode, reg, mem, reg2, mem2));
 	      add_reg_note (insn, REG_CFA_RESTORE, reg);
 	      add_reg_note (insn, REG_CFA_RESTORE, reg2);
 	    }
@@ -2015,10 +2049,10 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
 	  mem2 = gen_mem_ref (Pmode,
 			      plus_constant (Pmode, stack_pointer_rtx, offset));
 	  if (restore == false)
-	    insn = emit_insn (gen_store_pairdi (mem, reg, mem2, reg2));
+	    insn = emit_insn (aarch64_gen_store_pair (DImode, mem, reg, mem2, reg2));
 	  else
 	    {
-	      insn = emit_insn (gen_load_pairdi (reg, mem, reg2, mem2));
+	      insn = emit_insn (aarch64_gen_load_pair (DImode, reg, mem, reg2, mem2));
 	      add_reg_note (insn, REG_CFA_RESTORE, reg);
 	      add_reg_note (insn, REG_CFA_RESTORE, reg2);
 	    }
-- 
1.7.9.5