We should use offset calculated during frame layout instead of
ad-hoc interative increment.
This patch let the code fetch reg offsets from cfun->machine->frame.reg_offset.
By this fix, FP/LR could be treated as normal register also.
*no functional change*
OK to install?
thanks
gcc/
* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Use register
offset in
cfun->machine->frame.reg_offset.
(aarch64_save_or_restore_callee_save_registers): Likewise.
>From 03256b4c456569da68e5b33d82ecd9d47f281fba Mon Sep 17 00:00:00 2001
From: Jiong Wang <jiong.w...@arm.com>
Date: Tue, 17 Jun 2014 21:39:35 +0100
Subject: [PATCH 05/19] [AArch64/GCC][5/20] Use register offset in
'cfun->machine->frame.reg_offset'
We should use offset calculated during frame layout instead of
ad-hoc interative increment.
This patch let the code fetch reg offsets from cfun->machine->frame.reg_offset.
By this fix, FP/LR could be treated as normal register also.
*no functional change*
2014-06-16 Jiong Wang <jiong.w...@arm.com>
Marcus Shawcroft <marcus.shawcr...@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Use register offset
in cfun->machine->frame.reg_offset.
(aarch64_save_or_restore_callee_save_registers): Likewise.
---
gcc/config/aarch64/aarch64.c | 49 +++++++++++++++++++-----------------------
1 file changed, 22 insertions(+), 27 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index abcf30b..f61d96a 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1922,10 +1922,11 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, int increment,
if (aarch64_register_saved_on_entry (regno))
{
rtx mem;
- mem = gen_mem_ref (DFmode,
- plus_constant (Pmode,
- stack_pointer_rtx,
- start_offset));
+
+ HOST_WIDE_INT offset = start_offset
+ + cfun->machine->frame.reg_offset[regno];
+ mem = gen_mem_ref (DFmode, plus_constant (Pmode, stack_pointer_rtx,
+ offset));
for (regno2 = regno + 1;
regno2 <= V31_REGNUM
@@ -1940,12 +1941,10 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, int increment,
{
rtx mem2;
- /* Next highest register to be saved. */
+ offset = start_offset + cfun->machine->frame.reg_offset[regno2];
mem2 = gen_mem_ref (DFmode,
- plus_constant
- (Pmode,
- stack_pointer_rtx,
- start_offset + increment));
+ plus_constant (Pmode, stack_pointer_rtx,
+ offset));
if (restore == false)
{
insn = emit_insn
@@ -1971,7 +1970,6 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, int increment,
frame-related if explicitly marked. */
RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
regno = regno2;
- start_offset += increment * 2;
}
else
{
@@ -1983,7 +1981,6 @@ aarch64_save_or_restore_fprs (HOST_WIDE_INT start_offset, int increment,
add_reg_note (insn, REG_CFA_RESTORE,
gen_rtx_REG (DFmode, regno));
}
- start_offset += increment;
}
RTX_FRAME_RELATED_P (insn) = 1;
}
@@ -2010,10 +2007,11 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
if (aarch64_register_saved_on_entry (regno))
{
rtx mem;
- mem = gen_mem_ref (Pmode,
- plus_constant (Pmode,
- stack_pointer_rtx,
- start_offset));
+
+ HOST_WIDE_INT offset = start_offset
+ + cfun->machine->frame.reg_offset[regno];
+ mem = gen_mem_ref (Pmode, plus_constant (Pmode, stack_pointer_rtx,
+ offset));
for (regno2 = regno + 1;
regno2 <= limit
@@ -2022,17 +2020,18 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
{
/* Empty loop. */
}
+
if (regno2 <= limit
- && aarch64_register_saved_on_entry (regno2))
+ && aarch64_register_saved_on_entry (regno2)
+ && ((cfun->machine->frame.reg_offset[regno] + UNITS_PER_WORD)
+ == cfun->machine->frame.reg_offset[regno2]))
{
rtx mem2;
- /* Next highest register to be saved. */
+ offset = start_offset + cfun->machine->frame.reg_offset[regno2];
mem2 = gen_mem_ref (Pmode,
- plus_constant
- (Pmode,
- stack_pointer_rtx,
- start_offset + increment));
+ plus_constant (Pmode, stack_pointer_rtx,
+ offset));
if (restore == false)
{
insn = emit_insn
@@ -2058,7 +2057,6 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
frame-related if explicitly marked. */
RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1;
regno = regno2;
- start_offset += increment * 2;
}
else
{
@@ -2070,7 +2068,6 @@ aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT start_offset,
add_reg_note (insn, REG_CFA_RESTORE,
gen_rtx_REG (DImode, regno));
}
- start_offset += increment;
}
RTX_FRAME_RELATED_P (insn) = 1;
}
@@ -2269,8 +2266,7 @@ aarch64_expand_prologue (void)
RTX_FRAME_RELATED_P (insn) = 1;
}
- aarch64_save_or_restore_callee_save_registers
- (fp_offset + cfun->machine->frame.hardfp_offset, 0);
+ aarch64_save_or_restore_callee_save_registers (fp_offset, 0);
}
/* when offset >= 512,
@@ -2341,8 +2337,7 @@ aarch64_expand_epilogue (bool for_sibcall)
cfa_reg = stack_pointer_rtx;
}
- aarch64_save_or_restore_callee_save_registers
- (fp_offset + cfun->machine->frame.hardfp_offset, 1);
+ aarch64_save_or_restore_callee_save_registers (fp_offset, 1);
/* Restore the frame pointer and lr if the frame pointer is needed. */
if (offset > 0)
--
1.7.9.5
