Bother.

Apologies.

Simplest fix is to unshare the test body - patch attached; ok for trunk?

gcc/testsuite/ChangeLog:

        * gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
        * gcc.target/arm/simd/vextu64_1.c: Likewise.
        * gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
        * gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
        * gcc.target/aarch64/simd/ext_s64.x: Remove.
        * gcc.target/aarch64/simd/ext_u64.x: Remove.

--Alan


James Greenhalgh wrote:
On Thu, Jun 19, 2014 at 01:30:32PM +0100, Alan Lawrence wrote:
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x 
b/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
index 
c71011a5157a207fe68fe814ed80658fd5e0f90f..b879fdacaa6544790e4d3ff98ca0055073d6d1d1
 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
+++ b/gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
@@ -9,7 +9,7 @@ main (int argc, char **argv)
   int64_t arr2[] = {1};
   int64x1_t in2 = vld1_s64 (arr2);
   int64x1_t actual = vext_s64 (in1, in2, 0);
-  if (actual != in1)
+  if (actual[0] != in1[0])
     abort ();
return 0;
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x 
b/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
index 
8d5072bf761d96ea5a95342423ae9861d05d024a..bd51e27c2156bfcaca6b26798c449369b2894c08
 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
+++ b/gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
@@ -9,7 +9,7 @@ main (int argc, char **argv)
   uint64_t arr2[] = {1};
   uint64x1_t in2 = vld1_u64 (arr2);
   uint64x1_t actual = vext_u64 (in1, in2, 0);
-  if (actual != in1)
+  if (actual[0] != in1[0])
     abort ();
return 0;

Hi Alan,

Note that these files are also included by tests in the ARM backend, where
<u>int64x1_t is still a typedef to a scalar type, leading to:

  PASS->FAIL: gcc.target/arm/simd/vexts64_1.c (test for excess errors)
  ../aarch64/simd/ext_u64.x:12:23: error: subscripted value is neither array 
nor pointer nor vector

Thanks,
James

Index: gcc/testsuite/gcc.target/arm/simd/vexts64_1.c
===================================================================
--- gcc/testsuite/gcc.target/arm/simd/vexts64_1.c	(revision 211933)
+++ gcc/testsuite/gcc.target/arm/simd/vexts64_1.c	(working copy)
@@ -6,7 +6,22 @@
 /* { dg-add-options arm_neon } */
 
 #include "arm_neon.h"
-#include "../../aarch64/simd/ext_s64.x"
 
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  int64_t arr1[] = {0};
+  int64x1_t in1 = vld1_s64 (arr1);
+  int64_t arr2[] = {1};
+  int64x1_t in2 = vld1_s64 (arr2);
+  int64x1_t actual = vext_s64 (in1, in2, 0);
+  if (actual != in1)
+    abort ();
+
+  return 0;
+}
+
 /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
 /* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.target/arm/simd/vextu64_1.c
===================================================================
--- gcc/testsuite/gcc.target/arm/simd/vextu64_1.c	(revision 211933)
+++ gcc/testsuite/gcc.target/arm/simd/vextu64_1.c	(working copy)
@@ -6,7 +6,22 @@
 /* { dg-add-options arm_neon } */
 
 #include "arm_neon.h"
-#include "../../aarch64/simd/ext_u64.x"
 
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  uint64_t arr1[] = {0};
+  uint64x1_t in1 = vld1_u64 (arr1);
+  uint64_t arr2[] = {1};
+  uint64x1_t in2 = vld1_u64 (arr2);
+  uint64x1_t actual = vext_u64 (in1, in2, 0);
+  if (actual != in1)
+    abort ();
+
+  return 0;
+}
+
 /* Don't scan assembler for vext - it can be optimized into a move from r0.  */
 /* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x	(revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_s64.x	(working copy)
@@ -1,17 +0,0 @@
-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
-  int i, off;
-  int64_t arr1[] = {0};
-  int64x1_t in1 = vld1_s64 (arr1);
-  int64_t arr2[] = {1};
-  int64x1_t in2 = vld1_s64 (arr2);
-  int64x1_t actual = vext_s64 (in1, in2, 0);
-  if (actual[0] != in1[0])
-    abort ();
-
-  return 0;
-}
-
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x	(revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_u64.x	(working copy)
@@ -1,17 +0,0 @@
-extern void abort (void);
-
-int
-main (int argc, char **argv)
-{
-  int i, off;
-  uint64_t arr1[] = {0};
-  uint64x1_t in1 = vld1_u64 (arr1);
-  uint64_t arr2[] = {1};
-  uint64x1_t in2 = vld1_u64 (arr2);
-  uint64x1_t actual = vext_u64 (in1, in2, 0);
-  if (actual[0] != in1[0])
-    abort ();
-
-  return 0;
-}
-
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c	(revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_u64_1.c	(working copy)
@@ -4,8 +4,23 @@
 /* { dg-options "-save-temps -O3 -fno-inline" } */
 
 #include "arm_neon.h"
-#include "ext_u64.x"
 
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  uint64_t arr1[] = {0};
+  uint64x1_t in1 = vld1_u64 (arr1);
+  uint64_t arr2[] = {1};
+  uint64x1_t in2 = vld1_u64 (arr2);
+  uint64x1_t actual = vext_u64 (in1, in2, 0);
+  if (actual[0] != in1[0])
+    abort ();
+
+  return 0;
+}
+
 /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
    return its first argument, so it is legitimate to optimize it out.  */
 /* { dg-final { cleanup-saved-temps } } */
Index: gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c	(revision 211933)
+++ gcc/testsuite/gcc.target/aarch64/simd/ext_s64_1.c	(working copy)
@@ -4,8 +4,23 @@
 /* { dg-options "-save-temps -O3 -fno-inline" } */
 
 #include "arm_neon.h"
-#include "ext_s64.x"
 
+extern void abort (void);
+
+int
+main (int argc, char **argv)
+{
+  int64_t arr1[] = {0};
+  int64x1_t in1 = vld1_s64 (arr1);
+  int64_t arr2[] = {1};
+  int64x1_t in2 = vld1_s64 (arr2);
+  int64x1_t actual = vext_s64 (in1, in2, 0);
+  if (actual[0] != in1[0])
+    abort ();
+
+  return 0;
+}
+
 /* Do not scan-assembler.  An EXT instruction could be emitted, but would merely
    return its first argument, so it is legitimate to optimize it out.  */
 /* { dg-final { cleanup-saved-temps } } */

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