Andrew Bennett <andrew.benn...@imgtec.com> writes: >> -----Original Message----- >> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On >> Behalf Of Richard Sandiford >> Sent: 28 May 2014 10:42 >> To: Jaydeep Patil >> Cc: Rich Fuhler; Matthew Fortune; gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH][MIPS] P5600 scheduling >> >> Jaydeep Patil <jaydeep.pa...@imgtec.com> writes: >> > Please refer to the attached patch files. >> > >> > gcc-p5600-noMSA.patch >> > TARGET_P5600 has been removed >> >> Sorry, noticed one other thing: >> >> > +bool >> > +mips_fmadd_bypass (rtx out_insn, rtx in_insn) >> > +{ >> > + int dst_reg, src_reg; >> > + >> > + gcc_assert (get_attr_type (in_insn) == TYPE_FMADD); >> > + gcc_assert (get_attr_type (out_insn) == TYPE_FMADD); >> > + >> > + if (recog_memoized (in_insn) < 0 >> > + || recog_memoized (out_insn) < 0) >> > + return false; >> >> What I meant with the assertions vs. recog_memoized is that >> get_attr_type (...) == TYPE_FMADD only holds if the instructions >> are recognisable. Once you've asserted that the types are correct, >> the following: >> >> if (recog_memoized (in_insn) < 0 >> || recog_memoized (out_insn) < 0) >> return false; >> >> is dead code. The patch is OK with the recog_memoized calls removed. >> No need to repost the patch; just commit it with that change once >> the copyright log-jam is sorted out. > > I was just about to commit this patch for Jaydeep, when I found a few > issues. Firstly, the mips-tables.opt file was not regenerated.
FWIW, since regenerated files are often not posted as part of the patch, I'd just assumed the committer would do that. I should have checked the changelog though... > Secondly, I have changed invoke.texi to document the -march=p5600 > option. Thirdly, binutils defines p5600 as mip32r5, not mips32r2, > (which was causing assembler errors if you build using the > -march=p5600 gcc command line option). I have updated the > MIPS_ISA_LEVEL_SPEC to map -march=p5600 to -mips32r5, and made the > PROCESSOR_P5600 use the MIPS32r5 ISA value. Finally I have updated > the processor for mips32r5 entry to use p5600 rather than 74k. > > The updated patch and ChangeLog are shown below. > > Ok to commit? OK, thanks. Richard
