Since the aim of this series is to cache the result of preprocess_constraints,
we need to make sure that passes don't modify the information afterwards.
This patch deals with the places that did. Patch 4 will make the information
properly const.
Thanks,
Richard
gcc/
* recog.h (alternative_class): New function.
(which_op_alt): Return a const recog_op_alt.
* reg-stack.c (check_asm_stack_operands): Update type accordingly.
(subst_asm_stack_regs): Likewise.
* config/arm/arm.c (note_invalid_constants): Likewise.
* regcprop.c (copyprop_hardreg_forward_1): Likewise. Don't modify
the operand_alternative; use alternative class instead.
* sel-sched.c (get_reg_class): Likewise.
* regrename.c (build_def_use): Likewise.
(hide_operands, restore_operands, record_out_operands): Update type
accordingly.
Index: gcc/recog.h
===================================================================
--- gcc/recog.h 2014-05-31 08:57:21.608789337 +0100
+++ gcc/recog.h 2014-05-31 09:02:35.956369716 +0100
@@ -79,6 +79,14 @@ struct operand_alternative
unsigned int anything_ok:1;
};
+/* Return the class for operand I of alternative ALT, taking matching
+ constraints into account. */
+
+static inline enum reg_class
+alternative_class (const operand_alternative *alt, int i)
+{
+ return alt[i].matches >= 0 ? alt[alt[i].matches].cl : alt[i].cl;
+}
extern void init_recog (void);
extern void init_recog_no_volatile (void);
@@ -263,7 +271,7 @@ struct recog_data_d
on operand OP of the current instruction alternative (which_alternative).
Only valid after calling preprocess_constraints and constrain_operands. */
-inline static operand_alternative *
+inline static const operand_alternative *
which_op_alt ()
{
gcc_checking_assert (IN_RANGE (which_alternative, 0,
Index: gcc/reg-stack.c
===================================================================
--- gcc/reg-stack.c 2014-05-31 08:57:21.608789337 +0100
+++ gcc/reg-stack.c 2014-05-31 09:02:35.968369814 +0100
@@ -482,7 +482,7 @@ check_asm_stack_operands (rtx insn)
PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
return 0;
}
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
/* Strip SUBREGs here to make the following code simpler. */
for (i = 0; i < recog_data.n_operands; i++)
@@ -2030,7 +2030,7 @@ subst_asm_stack_regs (rtx insn, stack_pt
constrain_operands (1);
preprocess_constraints ();
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
get_asm_operands_in_out (body, &n_outputs, &n_inputs);
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c 2014-05-31 08:57:21.608789337 +0100
+++ gcc/config/arm/arm.c 2014-05-31 09:02:35.966369798 +0100
@@ -16872,7 +16872,7 @@ note_invalid_constants (rtx insn, HOST_W
this insn. */
preprocess_constraints ();
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
for (opno = 0; opno < recog_data.n_operands; opno++)
{
/* Things we need to fix can only occur in inputs. */
Index: gcc/regcprop.c
===================================================================
--- gcc/regcprop.c 2014-05-31 08:57:21.608789337 +0100
+++ gcc/regcprop.c 2014-05-31 09:02:35.957369724 +0100
@@ -775,20 +775,17 @@ copyprop_hardreg_forward_1 (basic_block
if (! constrain_operands (1))
fatal_insn_not_found (insn);
preprocess_constraints ();
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
n_ops = recog_data.n_operands;
is_asm = asm_noperands (PATTERN (insn)) >= 0;
- /* Simplify the code below by rewriting things to reflect
- matching constraints. Also promote OP_OUT to OP_INOUT
+ /* Simplify the code below by promoting OP_OUT to OP_INOUT
in predicated instructions. */
predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
for (i = 0; i < n_ops; ++i)
{
int matches = op_alt[i].matches;
- if (matches >= 0)
- op_alt[i].cl = op_alt[matches].cl;
if (matches >= 0 || op_alt[i].matched >= 0
|| (predicated && recog_data.operand_type[i] == OP_OUT))
recog_data.operand_type[i] = OP_INOUT;
@@ -939,12 +936,14 @@ copyprop_hardreg_forward_1 (basic_block
if (op_alt[i].is_address)
replaced[i]
= replace_oldest_value_addr (recog_data.operand_loc[i],
- op_alt[i].cl, VOIDmode,
- ADDR_SPACE_GENERIC, insn, vd);
+ alternative_class (op_alt, i),
+ VOIDmode, ADDR_SPACE_GENERIC,
+ insn, vd);
else if (REG_P (recog_data.operand[i]))
replaced[i]
= replace_oldest_value_reg (recog_data.operand_loc[i],
- op_alt[i].cl, insn, vd);
+ alternative_class (op_alt, i),
+ insn, vd);
else if (MEM_P (recog_data.operand[i]))
replaced[i] = replace_oldest_value_mem (recog_data.operand[i],
insn, vd);
Index: gcc/sel-sched.c
===================================================================
--- gcc/sel-sched.c 2014-05-31 08:57:21.608789337 +0100
+++ gcc/sel-sched.c 2014-05-31 09:02:35.970369830 +0100
@@ -1022,14 +1022,7 @@ get_reg_class (rtx insn)
preprocess_constraints ();
n_ops = recog_data.n_operands;
- operand_alternative *op_alt = which_op_alt ();
- for (i = 0; i < n_ops; ++i)
- {
- int matches = op_alt[i].matches;
- if (matches >= 0)
- op_alt[i].cl = op_alt[matches].cl;
- }
-
+ const operand_alternative *op_alt = which_op_alt ();
if (asm_noperands (PATTERN (insn)) > 0)
{
for (i = 0; i < n_ops; i++)
@@ -1037,7 +1030,7 @@ get_reg_class (rtx insn)
{
rtx *loc = recog_data.operand_loc[i];
rtx op = *loc;
- enum reg_class cl = op_alt[i].cl;
+ enum reg_class cl = alternative_class (op_alt, i);
if (REG_P (op)
&& REGNO (op) == ORIGINAL_REGNO (op))
@@ -1051,7 +1044,7 @@ get_reg_class (rtx insn)
for (i = 0; i < n_ops + recog_data.n_dups; i++)
{
int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
- enum reg_class cl = op_alt[opn].cl;
+ enum reg_class cl = alternative_class (op_alt, opn);
if (recog_data.operand_type[opn] == OP_OUT ||
recog_data.operand_type[opn] == OP_INOUT)
Index: gcc/regrename.c
===================================================================
--- gcc/regrename.c 2014-05-31 08:57:21.608789337 +0100
+++ gcc/regrename.c 2014-05-31 09:02:35.958369732 +0100
@@ -1427,7 +1427,7 @@ hide_operands (int n_ops, rtx *old_opera
unsigned HOST_WIDE_INT do_not_hide, bool inout_and_ec_only)
{
int i;
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
for (i = 0; i < n_ops; i++)
{
old_operands[i] = recog_data.operand[i];
@@ -1478,7 +1478,7 @@ restore_operands (rtx insn, int n_ops, r
record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info)
{
int n_ops = recog_data.n_operands;
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
int i;
@@ -1489,7 +1489,7 @@ record_out_operands (rtx insn, bool earl
? recog_data.operand_loc[opn]
: recog_data.dup_loc[i - n_ops]);
rtx op = *loc;
- enum reg_class cl = op_alt[opn].cl;
+ enum reg_class cl = alternative_class (op_alt, opn);
struct du_head *prev_open;
@@ -1571,7 +1571,7 @@ build_def_use (basic_block bb)
if (! constrain_operands (1))
fatal_insn_not_found (insn);
preprocess_constraints ();
- operand_alternative *op_alt = which_op_alt ();
+ const operand_alternative *op_alt = which_op_alt ();
n_ops = recog_data.n_operands;
untracked_operands = 0;
@@ -1584,8 +1584,7 @@ build_def_use (basic_block bb)
sizeof (operand_rr_info) * recog_data.n_operands);
}
- /* Simplify the code below by rewriting things to reflect
- matching constraints. Also promote OP_OUT to OP_INOUT in
+ /* Simplify the code below by promoting OP_OUT to OP_INOUT in
predicated instructions, but only for register operands
that are already tracked, so that we can create a chain
when the first SET makes a register live. */
@@ -1595,8 +1594,6 @@ build_def_use (basic_block bb)
{
rtx op = recog_data.operand[i];
int matches = op_alt[i].matches;
- if (matches >= 0)
- op_alt[i].cl = op_alt[matches].cl;
if (matches >= 0 || op_alt[i].matched >= 0
|| (predicated && recog_data.operand_type[i] == OP_OUT))
{
@@ -1681,7 +1678,7 @@ build_def_use (basic_block bb)
rtx *loc = (i < n_ops
? recog_data.operand_loc[opn]
: recog_data.dup_loc[i - n_ops]);
- enum reg_class cl = op_alt[opn].cl;
+ enum reg_class cl = alternative_class (op_alt, opn);
enum op_type type = recog_data.operand_type[opn];
/* Don't scan match_operand here, since we've no reg class
