On Fri, 2014-05-09 at 15:05 -0400, David Edelsohn wrote:
> On Fri, May 9, 2014 at 2:43 PM, Peter Bergner <berg...@vnet.ibm.com> wrote:
> > gcc/testsuite/
> >
> > * lib/target-support.exp (check_dfp_hw_available): New function.
> > (is-effective-target): Check $arg for dfp_hw.
> > (is-effective-target-keyword): Likewise.
> > * gcc.target/powerpc/pack03.c: (dg-require-effective-target):
> > Change target to dfp_hw.
>
> Okay.
Ok, I committed this to mainline as revision 210404, 4.9 as revision
210405 and 4.8 as revision 210406. Thanks.
I'll note that the patch includes documentation for the new keyword
along with a few others I noticed that were missing, which I've
included below for posterity.
Peter
* doc/sourcebuild.texi: (dfp_hw): Document.
(p8vector_hw): Likewise.
(powerpc_eabi_ok): Likewise.
(powerpc_elfv2): Likewise.
(powerpc_htm_ok): Likewise.
(ppc_recip_hw): Likewise.
(vsx_hw): Likewise.
Index: gcc/doc/sourcebuild.texi
===================================================================
--- gcc/doc/sourcebuild.texi (revision 210403)
+++ gcc/doc/sourcebuild.texi (working copy)
@@ -1601,6 +1601,13 @@ MIPS target supports @code{-mpaired-sing
@subsubsection PowerPC-specific attributes
@table @code
+
+@item dfp_hw
+PowerPC target supports executing hardware DFP instructions.
+
+@item p8vector_hw
+PowerPC target supports executing VSX instructions (ISA 2.07).
+
@item powerpc64
Test system supports executing 64-bit instructions.
@@ -1610,12 +1617,24 @@ PowerPC target supports AltiVec.
@item powerpc_altivec_ok
PowerPC target supports @code{-maltivec}.
+@item powerpc_eabi_ok
+PowerPC target supports @code{-meabi}.
+
+@item powerpc_elfv2
+PowerPC target supports @code{-mabi=elfv2}.
+
@item powerpc_fprs
PowerPC target supports floating-point registers.
@item powerpc_hard_double
PowerPC target supports hardware double-precision floating-point.
+@item powerpc_htm_ok
+PowerPC target supports @code{-mhtm}
+
+@item powerpc_p8vector_ok
+PowerPC target supports @code{-mpower8-vector}
+
@item powerpc_ppu_ok
PowerPC target supports @code{-mcpu=cell}.
@@ -1629,9 +1648,6 @@ PowerPC target supports PowerPC SPE.
@item powerpc_spu
PowerPC target supports PowerPC SPU.
-@item spu_auto_overlay
-SPU target has toolchain that supports automatic overlay generation.
-
@item powerpc_vsx_ok
PowerPC target supports @code{-mvsx}.
@@ -1639,8 +1655,17 @@ PowerPC target supports @code{-mvsx}.
Including the options used to compile this particular test, the
PowerPC target supports PowerPC 405.
+@item ppc_recip_hw
+PowerPC target supports executing reciprocal estimate instructions.
+
+@item spu_auto_overlay
+SPU target has toolchain that supports automatic overlay generation.
+
@item vmx_hw
PowerPC target supports executing AltiVec instructions.
+
+@item vsx_hw
+PowerPC target supports executing VSX instructions (ISA 2.06).
@end table
@subsubsection Other hardware attributes
