Hi all, Currently if we specify something like -march=armv8-a+nosimd or -mcpu=<cpu-name>+nosimd the backend will not use it properly to setup the TARGET_SIMD internal boolean that the backend checks for SIMD availability. In the end, the only effective way of disabling SIMD instructions was to specify -mgeneral-regs-only.
This patch fixes the situation by wiring up TARGET_SIMD (and TARGET_FLOAT and TARGET_CRYPTO) to take ito account the relevant AARCH64_ISA_* flags. This is a bug-fix for an issue that exists in 4.8 as well. Patch for that branch coming soon. In the meantime I think this should go in at this stage. Ok for trunk? Thanks, Kyrill 2014-04-04 Kyrylo Tkachov <kyrylo.tkac...@arm.com> * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Check TARGET_SIMD rather than TARGET_GENERAL_REGS_ONLY. (TARGET_SIMD): Take AARCH64_ISA_SIMD into account. (TARGET_FLOAT): Take AARCH64_ISA_FP into account. (TARGET_CRYPTO): Take TARGET_SIMD into account.
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 7962aa4..2fd6df4 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -32,7 +32,7 @@ else \ builtin_define ("__AARCH64EL__"); \ \ - if (!TARGET_GENERAL_REGS_ONLY) \ + if (TARGET_SIMD) \ builtin_define ("__ARM_NEON"); \ \ switch (aarch64_cmodel) \ @@ -83,9 +83,9 @@ #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) /* AdvSIMD is supported in the default configuration, unless disabled by - -mgeneral-regs-only. */ -#define TARGET_SIMD !TARGET_GENERAL_REGS_ONLY -#define TARGET_FLOAT !TARGET_GENERAL_REGS_ONLY + -mgeneral-regs-only or by the +nosimd extension. */ +#define TARGET_SIMD (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_SIMD) +#define TARGET_FLOAT (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_FP) #define UNITS_PER_WORD 8 @@ -185,8 +185,8 @@ extern unsigned long aarch64_isa_flags; extern unsigned long aarch64_tune_flags; #define AARCH64_TUNE_SLOWMUL (aarch64_tune_flags & AARCH64_FL_SLOWMUL) -/* Crypto is an optional feature. */ -#define TARGET_CRYPTO AARCH64_ISA_CRYPTO +/* Crypto is an optional extension to AdvSIMD. */ +#define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO) /* Standard register usage. */