On 28/03/14 00:20, DJ Delorie wrote:
This is OK after 4.9 branches (i.e. stage1). I suspect we could add
AX to the first alternative, although I don't know if it will get
used. We could add HL to the second alternative to complete the
replacement of the 'r' constraint.
Yes, the missing AX in the first alternative came to me later too. HL
is already in the second alternative ('T').
Looking at it again, it probably makes sense to change the third
alternative to 'shrw %0,8'. It's the same length as mov x,a/clrb a but
it's a cycle shorter. It also makes it more like the extendqihi2_real
insn, which isn't especially important, but does mean there's a certain
symmetry about it.
2014-03-28 Richard Hulme <pepe...@yahoo.com>
* config/rl78/rl78-real.md (zero_extendqihi2_real):
Minor optimizations to use clrb instruction where possible,
which is 1 byte shorter than 'mov'ing #0, and shrw, which
is 1 cycle less than a mov/clrb sequence.
---
gcc/config/rl78/rl78-real.md | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rl78/rl78-real.md b/gcc/config/rl78/rl78-real.md
index 27ff60f..5d5c598 100644
--- a/gcc/config/rl78/rl78-real.md
+++ b/gcc/config/rl78/rl78-real.md
@@ -77,12 +77,14 @@
;;---------- Conversions ------------------------
(define_insn "*zero_extendqihi2_real"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=rv,A")
- (zero_extend:HI (match_operand:QI 1 "general_operand" "0,a")))]
+ [(set (match_operand:HI 0 "nonimmediate_operand"
"=ABv,DT,A,B")
+ (zero_extend:HI (match_operand:QI 1 "general_operand" "0,0,a,b")))]
"rl78_real_insns_ok ()"
"@
+ clrb\t%Q0
mov\t%Q0, #0
- mov\tx, a \;mov\ta, #0"
+ shrw\t%0, 8
+ shrw\t%0, 8"
)
(define_insn "*extendqihi2_real"
--
1.7.9.5
