Hi all,I noticed that we don't handle simple reg-to-reg arithmetic operations in the arm rtx cost functions. We should be adding the cost of alu.arith to the costs of the operands. This patch does that. Since we don't have any cost tables yet that have a non-zero value for that field it shouldn't affect code-gen for any current cores.
Bootstrapped and tested on arm-none-linux-gnueabihf. Ok for next stage1? Thanks, Kyrill 2014-03-24 Kyrylo Tkachov <kyrylo.tkac...@arm.com> * config/arm/arm.c (arm_new_rtx_costs): Handle reg-to-reg PLUS and MINUS RTXs.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index bf5d1b2..3102b67 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -9428,6 +9428,14 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, *cost += rtx_cost (XEXP (x, 1), code, 1, speed_p); return true; } + else if (REG_P (XEXP (x, 0))) + { + *cost += rtx_cost (XEXP (x, 0), code, 0, speed_p) + + rtx_cost (XEXP (x, 1), code, 1, speed_p); + if (speed_p) + *cost += extra_cost->alu.arith; + return true; + } return false; } @@ -9663,6 +9671,14 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, *cost += rtx_cost (XEXP (x, 0), PLUS, 0, speed_p); return true; } + else if (REG_P (XEXP (x, 1))) + { + *cost += rtx_cost (XEXP (x, 0), PLUS, 0, speed_p) + + rtx_cost (XEXP (x, 1), PLUS, 1, speed_p); + if (speed_p) + *cost += extra_cost->alu.arith; + return true; + } return false; }