On Tue, Jan 28, 2014 at 3:37 AM, Zhenqiang Chen <zhenqiang.c...@linaro.org> wrote: > On 28 January 2014 01:07, Ramana Radhakrishnan > <ramana....@googlemail.com> wrote: >> On Thu, Jan 16, 2014 at 5:44 AM, Zhenqiang Chen >> <zhenqiang.c...@linaro.org> wrote: >>> Thanks for comments. >>> >>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59837 >>> >>> The patch with a test case is attached. >> >> >>> +/* { dg-options " -Os -fno-omit-frame-pointer -mapcs -mabi=aapcs-linux >>> -marm -mfloat-abi=softfp -g " } */ >> >> Can you instead do ? >> >> { dg-options "-Os -fno-omit-frame-pointer -mapcs" } >> { dg-add-options arm_neon } >> >> I don't like this as it as it stands because the test relies on the >> compiler being configured for neon by default. > > Thanks. The test case is updated according to your comments. > > The patch is also updated to skip dwarf info in function > arm_emit_multi_reg_pop when shrink-wrap is not enabled. A new test > case (pr59837-1.c) is added to reproduce the issue. And I double check > the arm_expand_epilogue_apcs_frame. There is no more function which > adds REG_CFA_ADJUST_CFA NOTE.
This is OK if no regressions and an RM doesn't object in 24 hours. maps-frame is used in the kernel so fixing this up for 4.9 would be good. Cheers, Ramana > > Thanks! > -Zhenqiang > > >>> 2014-01-16 Zhenqiang Chen <zhenqiang.c...@linaro.org> >>> >>> PR target/59837 >>> * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Do not add >>> REG_CFA_ADJUST_CFA NOTE if shrink-wrap is not enabled. >>> >>> testsuite/ChangeLog: >>> 2014-01-16 Zhenqiang Chen <zhenqiang.c...@linaro.org> >>> >>> * gcc.target/arm/pr59837.c: New testcase. >>> >>> On 15 January 2014 19:56, Ramana Radhakrishnan >>> <ramana.radhakrish...@arm.com> wrote: >>>> Please also create a bugzilla entry for this and use the pr number here. >>>> >>>> Ramana >>>> >>>> >>>> Sent from Samsung Mobile >>>> >>>> >>>> >>>> -------- Original message -------- >>>> From: Zhenqiang Chen <zhenqiang.c...@linaro.org> >>>> Date: >>>> To: gcc-patches@gcc.gnu.org >>>> Cc: Richard Earnshaw <richard.earns...@arm.com>,Ramana Radhakrishnan >>>> <ramana.radhakrish...@arm.com> >>>> Subject: [PATCH, ARM] ICE when building kernel raid6 neon code >>>> >>>> >>>> Hi, >>>> >>>> The patch fixes ICE when building kernel raid6 neon code. >>>> >>>> lib/raid6/neon4.c: In function 'raid6_ >>>> >>>> neon4_gen_syndrome_real': >>>> lib/raid6/neon4.c:113:1: internal compiler error: in >>>> dwarf2out_frame_debug_adjust_cfa, at dwarf2cfi.c:1090 >>>> } >>>> >>>> https://bugs.launchpad.net/gcc-linaro/+bug/1268893 >>>> >>>> Root cause: >>>> When expanding epilogue, REG_CFA_ADJUST_CFA NOTE is added to handle >>>> dwarf info issue for shrink-wrap. But for TARGET_APCS_FRAME, >>>> shrink-wrap is disabled. And not all dwarf info in >>>> arm_expand_epilogue_apcs_frame are correctly updated. >>>> arm_emit_vfp_multi_reg_pop is called by both >>>> arm_expand_epilogue_apcs_frame and arm_expand_epilogue. So we should >>>> not add the NOTE in arm_emit_vfp_multi_reg_pop if shrink-wrap is not >>>> enabled. >>>> >>>> Boot strap and no make check regression on ARM Chromebook. >>>> >>>> OK for trunk? >>>> >>>> Thanks! >>>> -Zhenqiang >>>> >>>> ChangeLog: >>>> 2014-01-15 Zhenqiang Chen <zhenqiang.c...@linaro.org> >>>> >>>> * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Do not add >>>> REG_CFA_ADJUST_CFA NOTE if shrink-wrap is not enabled. >>>> >>>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c >>>> index 18196b3..1ccb796 100644 >>>> --- a/gcc/config/arm/arm.c >>>> +++ b/gcc/config/arm/arm.c >>>> @@ -19890,8 +19890,12 @@ arm_emit_vfp_multi_reg_pop (int first_reg, >>>> int num_regs, rtx base_reg) >>>> par = emit_insn (par); >>>> REG_NOTES (par) = dwarf; >>>> >>>> - arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs, >>>> - base_reg, base_reg); >>>> + /* REG_CFA_ADJUST_CFA NOTE is added to handle dwarf info issue when >>>> + shrink-wrap is enabled. So when shrink-wrap is not enabled, we >>>> should >>>> + not add the note. */ >>>> + if (flag_shrink_wrap) >>>> + arm_add_cfa_adjust_cfa_note (par, 2 * UNITS_PER_WORD * num_regs, >>>> + base_reg, base_reg); >>>> } >>>> >>>> /* Generate and emit a pattern that will be recognized as LDRD >>>> pattern. If even >>>> >>>> >>>> -- IMPORTANT NOTICE: The contents of this email and any attachments are >>>> confidential and may also be privileged. If you are not the intended >>>> recipient, please notify the sender immediately and do not disclose the >>>> contents to any other person, use it for any purpose, or store or copy the >>>> information in any medium. Thank you. >>>> >>>> ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >>>> Registered in England & Wales, Company No: 2557590 >>>> ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, >>>> Registered in England & Wales, Company No: 2548782
